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[83.9.1.212]) by smtp.gmail.com with ESMTPSA id g6-20020a056512118600b00494a603953dsm1410687lfr.89.2022.12.20.02.53.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 20 Dec 2022 02:53:14 -0800 (PST) Message-ID: <00dba8ee-034b-d269-0907-bfc5ca27b8ac@linaro.org> Date: Tue, 20 Dec 2022 11:53:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.6.0 Subject: Re: [PATCH v3 12/15] arm64: dts: qcom: msm8916: specify per-sensor calibration cells Content-Language: en-US To: Dmitry Baryshkov , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Amit Kucheria , Thara Gopinath , "Rafael J. Wysocki" , Daniel Lezcano , Zhang Rui Cc: linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org References: <20221220024721.947147-1-dmitry.baryshkov@linaro.org> <20221220024721.947147-13-dmitry.baryshkov@linaro.org> From: Konrad Dybcio In-Reply-To: <20221220024721.947147-13-dmitry.baryshkov@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 20.12.2022 03:47, Dmitry Baryshkov wrote: > Specify pre-parsed per-sensor calibration nvmem cells in the tsens > device node rather than parsing the whole data blob in the driver. > > Signed-off-by: Dmitry Baryshkov > --- > arch/arm64/boot/dts/qcom/msm8916.dtsi | 70 ++++++++++++++++++++++++--- > 1 file changed, 64 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi > index 2ca8e977fc2a..af7ba66bb7cd 100644 > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi > @@ -442,11 +442,57 @@ qfprom: qfprom@5c000 { > reg = <0x0005c000 0x1000>; > #address-cells = <1>; > #size-cells = <1>; > - tsens_caldata: caldata@d0 { > - reg = <0xd0 0x8>; > + tsens_base1: base1@d0 { > + reg = <0xd0 0x1>; > + bits = <0 7>; > }; > - tsens_calsel: calsel@ec { > - reg = <0xec 0x4>; > + tsens_s0_p1: s0_p1@d0 { No underscores in node names. > + reg = <0xd0 0x2>; > + bits = <7 5>; > + }; > + tsens_s0_p2: s0_p2@d1 { > + reg = <0xd1 0x2>; > + bits = <4 5>; > + }; > + tsens_s1_p1: s1_p1@d2 { > + reg = <0xd2 0x1>; > + bits = <1 5>; > + }; > + tsens_s1_p2: s1_p2@d2 { > + reg = <0xd2 0x2>; > + bits = <6 5>; > + }; > + tsens_s2_p1: s2_p1@d3 { > + reg = <0xd3 0x1>; > + bits = <3 5>; > + }; > + tsens_s2_p2: s2_p2@d4 { > + reg = <0xd4 0x1>; > + bits = <0 5>; > + }; > + tsens_s3_p1: s3_p1@d4 { > + reg = <0xd4 0x2>; > + bits = <5 5>; > + }; > + tsens_s3_p2: s3_p2@d5 { > + reg = <0xd5 0x1>; > + bits = <2 5>; > + }; > + tsens_s4_p1: s4_p1@d5 { > + reg = <0xd5 0x2>; > + bits = <7 5>; > + }; > + tsens_s4_p2: s4_p2@d6 { > + reg = <0xd6 0x2>; > + bits = <4 5>; > + }; > + tsens_base2: base2@d7 { > + reg = <0xd7 0x1>; > + bits = <1 7>; > + }; > + tsens_mode: mode@ec { > + reg = <0xef 0x1>; > + bits = <5 3>; > }; I (gotta admin, a bit painfully) went through all of these again and they all seem correct! Konrad > }; > > @@ -473,8 +519,20 @@ tsens: thermal-sensor@4a9000 { > compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; > reg = <0x004a9000 0x1000>, /* TM */ > <0x004a8000 0x1000>; /* SROT */ > - nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; > - nvmem-cell-names = "calib", "calib_sel"; > + nvmem-cells = <&tsens_mode>, > + <&tsens_base1>, <&tsens_base2>, > + <&tsens_s0_p1>, <&tsens_s0_p2>, > + <&tsens_s1_p1>, <&tsens_s1_p2>, > + <&tsens_s2_p1>, <&tsens_s2_p2>, > + <&tsens_s3_p1>, <&tsens_s3_p2>, > + <&tsens_s4_p1>, <&tsens_s4_p2>; > + nvmem-cell-names = "mode", > + "base1", "base2", > + "s0_p1", "s0_p2", > + "s1_p1", "s1_p2", > + "s2_p1", "s2_p2", > + "s3_p1", "s3_p2", > + "s4_p1", "s4_p2"; > #qcom,sensors = <5>; > interrupts = ; > interrupt-names = "uplow";