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From: Vishnu Reddy <busanna.reddy@oss.qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Cc: sashiko-reviews@lists.linux.dev,
	Vikash Garodia <vikash.garodia@oss.qualcomm.com>,
	media-ci@linuxtv.org, conor+dt@kernel.org, robh@kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH v5 04/13] iommu: of_iommu: Add support for "iommu-ranges" on a device node
Date: Fri, 9 Oct 2026 16:11:37 +0530	[thread overview]
Message-ID: <00f80a9b-7d99-3479-c69c-a22abf89cd27@oss.qualcomm.com> (raw)
In-Reply-To: <nsx2uqk34i6kqpnjpigkutynjth3y2jtpsjtldbtsd6di45owc@vm6u5bv6mzqe>


On 10/8/2026 3:30 PM, Dmitry Baryshkov wrote:
> On Sat, Sep 26, 2026 at 01:23:06PM +0530, Vishnu Reddy wrote:
>>
>> On 9/26/2026 12:17 PM, sashiko-bot@kernel.org wrote:
>>> Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:
>>> - [High] iommu: size_t truncation of derived reserved region length on 32-bit systems
>>> - [Medium] iommu: DT ABI breakage by rejecting iommu-addresses without reg
>>> - [Medium] iommu: OOB read in of_iommu_derive_resv_regions when parsing malformed iommu-ranges
>>> --
>>>
>>> commit 08a09989ffefcbf5d38171159dcc911ca993ff18
>>> Author: Vikash Garodia <vikash.garodia@oss.qualcomm.com>
>>>
>>> iommu: of_iommu: Add support for "iommu-ranges" on a device node
>>>
>>> Add support for "iommu-ranges" on device nodes to specify usable IOVA
>>> ranges directly when there is no backing "reg". Introduce logic to derive
>>> reserved regions outside of "iommu-ranges" and restrict "iommu-addresses"
>>> to be paired with a "reg" property.
>>>
>>> Link: https://lore.kernel.org/all/662f7093-fb0a-4564-9ca0-98e03e68ba9a@kernel.org
>>>
>>>> diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c
>>>> index a18bb60f6f3df..9766a6944d0e1 100644
>>>> --- a/drivers/iommu/of_iommu.c
>>>> +++ b/drivers/iommu/of_iommu.c
>>> [ ... ]
>>>> +static void of_iommu_derive_resv_regions(struct device *dev, struct list_head *list)
>>>> +{
>>> [ ... ]
>>>> +	maps = of_get_property(dev->of_node, "iommu-ranges", &size);
>>>> +	if (!maps)
>>>> +		return;
>>>> +
>>>> +	end = maps + size / sizeof(__be32);
>>>> +
>>>> +	while (maps < end) {
>>>> +		phys_addr_t iova, iova_end;
>>>> +		size_t length;
>>>> +
>>>> +		maps = of_translate_dma_region(dev->of_node, maps, &iova, &length);
>>> [Severity: Medium]
>>> Could this result in an out-of-bounds read if the "iommu-ranges" property is
>>> malformed?
>>>
>>> The loop condition checks `maps < end`, but of_translate_dma_region()
>>> implicitly reads `na + ns` cells from the maps array.
>>>
>>> Does this loop need to ensure there are at least `na + ns` cells remaining
>>> before calling the translation function to prevent reading past the buffer?
>>>
>> This function intention is not to validate the address and size cells here and
>> it's not valid to read those properties here. If the out of bound ranges are
>> there, then it's part of dtc checks that dt node contains invalid ranges.
>>
>>> [ ... ]
>>>> +	list_for_each_entry_safe(pos, next_range, &ranges, node) {
>>>> +		if (pos->start > next) {
>>>> +			region = iommu_alloc_resv_region(next, pos->start - next, prot,
>>>> +							 IOMMU_RESV_RESERVED, GFP_KERNEL);
>>> [Severity: High]
>>> Can the length argument overflow on 32-bit systems?
>>>
>>> On 32-bit systems with 64-bit physical addresses (like ARM LPAE), address
>>> differences can easily exceed 4GB. Because iommu_alloc_resv_region() takes
>>> a 32-bit size_t length, passing a 64-bit gap size causes it to truncate.
>>>
>>> Will this truncation result in a reservation of at most 4GB, leaving the
>>> IOVA address space above that unprotected?
>>>
>>> [ ... ]
>>>> +	region = iommu_alloc_resv_region(next, PHYS_ADDR_MAX - next + 1,
>>>> +					 prot, IOMMU_RESV_RESERVED, GFP_KERNEL);
>>> [Severity: High]
>>> Similarly, can passing `PHYS_ADDR_MAX - next + 1` here truncate the length
>>> to its lower 32 bits on 32-bit systems?
>>>
>>> If the remaining address space exceeds 4GB, this truncation could leave high
>>> IOVA addresses unprotected, allowing the IOMMU allocator to hand out reserved
>>> IOVAs.
>>>
>> size_t can hold up to 32 bit range in LPAE platforms. The relevant driver has to
>> set the dma_limit max range in that case.
> As this is generic code, could you please adapt the code to work
> correctly on LPAE systems?

This is no different than the existing logic where client tries to reserve
greater than 32bit length on the 32bit LPAE platforms.

I'm not convinced why sashiko claims this is introduced in this patch.

>

  reply	other threads:[~2026-10-09 10:41 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-26  6:33 [PATCH v5 00/13] media: iris: Migrate iommus to iris sub nodes Vikash Garodia
2026-09-26  6:34 ` [PATCH v5 01/13] dt-bindings: media: qcom,venus: Add context bank subnodes to common schema Vikash Garodia
2026-10-08  6:46   ` Zhangfei Gao
2026-10-08  9:34     ` Vikash Garodia
2026-10-08 12:02       ` Zhangfei Gao
2026-10-08 22:58   ` Bryan O'Donoghue
2026-09-26  6:34 ` [PATCH v5 02/13] dt-bindings: media: qcom,sm8550-iris: Add context bank subnodes Vikash Garodia
2026-10-08 22:58   ` Bryan O'Donoghue
2026-09-26  6:34 ` [PATCH v5 03/13] dt-bindings: media: qcom,sm8750-iris: " Vikash Garodia
2026-09-26  6:34 ` [PATCH v5 04/13] iommu: of_iommu: Add support for "iommu-ranges" on a device node Vikash Garodia
2026-09-26  6:47   ` sashiko-bot
2026-09-26  7:53     ` Vishnu Reddy
2026-10-08 10:00       ` Dmitry Baryshkov
2026-10-09 10:41         ` Vishnu Reddy [this message]
2026-10-09  9:27   ` bod
2026-09-26  6:34 ` [PATCH v5 05/13] media: iris: Add non-pixel and pixel context bank devices Vikash Garodia
2026-09-26  6:34 ` [PATCH v5 06/13] media: iris: Route buffers to the matching context bank device Vikash Garodia
2026-09-26  6:49   ` sashiko-bot
2026-09-26  8:31     ` Vishnu Reddy
2026-10-08 10:18       ` Dmitry Baryshkov
2026-10-09 11:14         ` Vishnu Reddy
2026-09-26  6:34 ` [PATCH v5 07/13] media: iris: Skip DMA mask setup when the core device has no IOMMU Vikash Garodia
2026-09-26  6:34 ` [PATCH v5 08/13] arm64: dts: qcom: hamoa: Add Iris context bank subnodes Vikash Garodia
2026-09-30 10:32   ` Konrad Dybcio
2026-10-08 10:18   ` Dmitry Baryshkov
2026-09-26  6:34 ` [PATCH v5 09/13] arm64: dts: qcom: sm8550: " Vikash Garodia
2026-09-30 10:32   ` Konrad Dybcio
2026-10-08 10:19   ` Dmitry Baryshkov
2026-09-26  6:34 ` [PATCH v5 10/13] arm64: dts: qcom: lemans: " Vikash Garodia
2026-09-30 10:33   ` Konrad Dybcio
2026-10-08 10:19   ` Dmitry Baryshkov
2026-09-26  6:34 ` [PATCH v5 11/13] arm64: dts: qcom: monaco: " Vikash Garodia
2026-09-30 10:33   ` Konrad Dybcio
2026-10-08 10:19   ` Dmitry Baryshkov
2026-09-26  6:34 ` [PATCH v5 12/13] arm64: dts: qcom: sm8650: " Vikash Garodia
2026-09-30 10:33   ` Konrad Dybcio
2026-10-08 10:19   ` Dmitry Baryshkov
2026-09-26  6:34 ` [PATCH v5 13/13] arm64: dts: qcom: sm8750: " Vikash Garodia
2026-09-30 10:33   ` Konrad Dybcio
2026-10-08 10:19   ` Dmitry Baryshkov
2026-09-30 10:33 ` [PATCH v5 00/13] media: iris: Migrate iommus to iris sub nodes Konrad Dybcio

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