public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
Cc: vkoul@kernel.org, kishon@kernel.org, robh@kernel.org,
	krzk+dt@kernel.org, conor+dt@kernel.org,
	dmitry.baryshkov@linaro.org, neil.armstrong@linaro.org,
	abel.vesa@linaro.org, manivannan.sadhasivam@linaro.org,
	lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com,
	andersson@kernel.org, konradybcio@kernel.org,
	linux-phy@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-pci@vger.kernel.org, quic_qianyu@quicinc.com,
	quic_krichai@quicinc.com, quic_vbadigan@quicinc.com
Subject: Re: [PATCH v5 2/6] dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300
Date: Wed, 7 May 2025 10:25:52 +0200	[thread overview]
Message-ID: <01b06e36-823c-4f28-8db5-dc0ee0b4c063@kernel.org> (raw)
In-Reply-To: <8fef4573-0527-44d8-a481-f3271d9ffa33@quicinc.com>

On 07/05/2025 10:19, Ziyue Zhang wrote:
> 
> On 5/7/2025 1:10 PM, Krzysztof Kozlowski wrote:
>> On Wed, May 07, 2025 at 11:10:15AM GMT, Ziyue Zhang wrote:
>>> Add compatible for qcs8300 platform, with sa8775p as the fallback.
>>>
>>> Signed-off-by: Ziyue Zhang <quic_ziyuzhan@quicinc.com>
>>> ---
>>>   .../bindings/pci/qcom,pcie-sa8775p.yaml       | 26 ++++++++++++++-----
>>>   1 file changed, 19 insertions(+), 7 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>> index efde49d1bef8..154bb60be402 100644
>>> --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sa8775p.yaml
>>> @@ -16,7 +16,12 @@ description:
>>>   
>>>   properties:
>>>     compatible:
>>> -    const: qcom,pcie-sa8775p
>>> +    oneOf:
>>> +      - const: qcom,pcie-sa8775p
>>> +      - items:
>>> +          - enum:
>>> +              - qcom,pcie-qcs8300
>>> +          - const: qcom,pcie-sa8775p
>>>   
>>>     reg:
>>>       minItems: 6
>>> @@ -45,7 +50,7 @@ properties:
>>>   
>>>     interrupts:
>>>       minItems: 8
>>> -    maxItems: 8
>>> +    maxItems: 9
>> I don't understand why this is flexible for sa8775p. I assume this
>> wasn't tested or finished, just like your previous patch suggested.
>>
>> Please send complete bindings once you finish them or explain what
>> exactly changed in the meantime.
>>
>> Best regards,
>> Krzysztof
> 
> Hi Krzysztof
> Global interrupt is optional in the PCIe driver. It is not present in 
> the SA8775p PCIe device tree node, but it is required for the QCS8300

And hardware?

> I did the DTBs and yaml checks before pushing this patch. This is how
> I became aware that `maxItem` needed to be changed to 9.
If it is required for QCS8300, then you are supposed to make it required
in the binding for this device. Look at other bindings.

Best regards,
Krzysztof

  reply	other threads:[~2025-05-07  8:25 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-07  3:10 [PATCH v5 0/6] pci: qcom: Add QCS8300 PCIe support Ziyue Zhang
2025-05-07  3:10 ` [PATCH v5 1/6] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindings for sa8775p Ziyue Zhang
2025-05-07  5:09   ` Krzysztof Kozlowski
2025-05-07  7:18     ` Ziyue Zhang
2025-05-07  3:10 ` [PATCH v5 2/6] dt-bindings: PCI: qcom,pcie-sa8775p: document qcs8300 Ziyue Zhang
2025-05-07  5:10   ` Krzysztof Kozlowski
2025-05-07  8:19     ` Ziyue Zhang
2025-05-07  8:25       ` Krzysztof Kozlowski [this message]
2025-05-07  9:56         ` Qiang Yu
2025-05-07 10:03           ` Krzysztof Kozlowski
2025-05-07 10:07             ` Qiang Yu
2025-05-07  3:10 ` [PATCH v5 3/6] arm64: dts: qcom: qcs8300: enable pcie0 Ziyue Zhang
2025-05-07  3:10 ` [PATCH v5 4/6] arm64: dts: qcom: qcs8300-ride: enable pcie0 interface Ziyue Zhang
2025-05-07  3:10 ` [PATCH v5 5/6] arm64: dts: qcom: qcs8300: enable pcie1 Ziyue Zhang
2025-05-07  3:10 ` [PATCH v5 6/6] arm64: dts: qcom: qcs8300-ride: enable pcie1 interface Ziyue Zhang
2025-05-07 15:41 ` [PATCH v5 0/6] pci: qcom: Add QCS8300 PCIe support Rob Herring (Arm)
2025-05-11 22:33 ` Bjorn Andersson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=01b06e36-823c-4f28-8db5-dc0ee0b4c063@kernel.org \
    --to=krzk@kernel.org \
    --cc=abel.vesa@linaro.org \
    --cc=andersson@kernel.org \
    --cc=bhelgaas@google.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=kishon@kernel.org \
    --cc=konradybcio@kernel.org \
    --cc=krzk+dt@kernel.org \
    --cc=kw@linux.com \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linux-phy@lists.infradead.org \
    --cc=lpieralisi@kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=neil.armstrong@linaro.org \
    --cc=quic_krichai@quicinc.com \
    --cc=quic_qianyu@quicinc.com \
    --cc=quic_vbadigan@quicinc.com \
    --cc=quic_ziyuzhan@quicinc.com \
    --cc=robh@kernel.org \
    --cc=vkoul@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox