From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mesih Kilinc Subject: [PATCH 7/7] ARM: dts: f1c100s: Activate SPI flash on Lichee Pi Nano Date: Mon, 11 Feb 2019 12:21:13 +0300 Message-ID: <02be41b6187d4d1fe09bff24cb93c2400a166803.1549875778.git.mesihkilinc@gmail.com> References: Reply-To: mesihkilinc-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org In-Reply-To: List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Cc: Mesih Kilinc , Maxime Ripard , Chen-Yu Tsai , Linus Walleij , Icenowy Zheng , Rob Herring List-Id: devicetree@vger.kernel.org The Lichee Pi Nano board has a Winbond W25Q128FVSIQ 128Mbit SPI NOR flash connected to the SPI0 controller of F1C100s SoC, via the pinmux group at PC bank; so it's bootable. Enable this SPI flash. Signed-off-by: Mesih Kilinc --- arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts index a1154e6..52a29be 100644 --- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts +++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts @@ -24,3 +24,16 @@ pinctrl-0 = <&uart0_pe_pins>; status = "okay"; }; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_pc_pins>; + status = "okay"; + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + }; +}; -- 2.7.4