[PATCH Resend 1/3] ARM: EXYNOS: Consolidate Kconfig entries

[PATCH Resend 1/3] ARM: EXYNOS: Consolidate Kconfig entries

[Sachin Kamat]

Instead of repeating the Kconfig entries for every SoC, move them under
ARCH_EXYNOS4 and 5 and move the entries common to both 4 and 5 under
ARCH_EXYNOS. Also, since the individual SoCs do not have any specific
machine/platform code, keep them as boolean symbols instead of user
selectable and select them from Exynos4 and 5 config symbols. Individual
SoC symbols can be removed eventually once the driver Kconfig dependencies
on these symbols are removed.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
---
This is a resend of the series rebased on top of latest linux-next and
Tomasz Figa's PM consolidation series 1 and 2.
---
 arch/arm/Kconfig             |   10 +++++
 arch/arm/mach-exynos/Kconfig |   89 +++++++++++-------------------------------
 2 files changed, 33 insertions(+), 66 deletions(-)

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index afc751f750b9..e2428a18f2a6 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -821,18 +821,28 @@ config ARCH_S5PV210
 
 config ARCH_EXYNOS
 	bool "Samsung EXYNOS"
+	select ARCH_HAS_BANDGAP
 	select ARCH_HAS_CPUFREQ
 	select ARCH_HAS_HOLES_MEMORYMODEL
 	select ARCH_REQUIRE_GPIOLIB
 	select ARCH_SPARSEMEM_ENABLE
+	select ARM_AMBA
 	select ARM_GIC
+	select CLKSRC_OF
 	select COMMON_CLK
 	select CPU_V7
 	select GENERIC_CLOCKEVENTS
+	select HAVE_ARM_SCU if SMP
 	select HAVE_S3C2410_I2C if I2C
 	select HAVE_S3C2410_WATCHDOG if WATCHDOG
 	select HAVE_S3C_RTC if RTC_CLASS
+	select HAVE_SMP
 	select NEED_MACH_MEMORY_H
+	select PINCTRL
+	select PINCTRL_EXYNOS
+	select PM_GENERIC_DOMAINS if PM_RUNTIME
+	select S5P_DEV_MFC
+	select SAMSUNG_DMADEV
 	select SPARSE_IRQ
 	select USE_OF
 	help
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index fc8bf18e222d..9398bab87a76 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -14,90 +14,32 @@ menu "SAMSUNG EXYNOS SoCs Support"
 config ARCH_EXYNOS4
 	bool "SAMSUNG EXYNOS4"
 	default y
-	select ARM_AMBA
-	select CLKSRC_OF
+	select ARM_CPU_SUSPEND if PM_SLEEP
 	select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
 	select CPU_EXYNOS4210
 	select GIC_NON_BANKED
 	select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
-	select HAVE_ARM_SCU if SMP
-	select HAVE_SMP
 	select MIGHT_HAVE_CACHE_L2X0
-	select PINCTRL
-	select PM_GENERIC_DOMAINS if PM_RUNTIME
-	select S5P_DEV_MFC
+	select SOC_EXYNOS4212
+	select SOC_EXYNOS4412
 	help
-	  Samsung EXYNOS4 SoCs based systems
+	  Samsung EXYNOS4 (Cortex-A9) SoC based systems
 
 config ARCH_EXYNOS5
 	bool "SAMSUNG EXYNOS5"
-	select ARM_AMBA
-	select CLKSRC_OF
-	select HAVE_ARM_SCU if SMP
-	select HAVE_SMP
-	select PINCTRL
-	help
-	  Samsung EXYNOS5 (Cortex-A15) SoC based systems
-
-comment "EXYNOS SoCs"
-
-config CPU_EXYNOS4210
-	bool "SAMSUNG EXYNOS4210"
-	default y
-	depends on ARCH_EXYNOS4
-	select ARCH_HAS_BANDGAP
-	select ARM_CPU_SUSPEND if PM_SLEEP
-	select PINCTRL_EXYNOS
-	select SAMSUNG_DMADEV
-	help
-	  Enable EXYNOS4210 CPU support
-
-config SOC_EXYNOS4212
-	bool "SAMSUNG EXYNOS4212"
 	default y
-	depends on ARCH_EXYNOS4
-	select ARCH_HAS_BANDGAP
-	select PINCTRL_EXYNOS
-	select SAMSUNG_DMADEV
+	select SOC_EXYNOS5250
+	select SOC_EXYNOS5420
 	help
-	  Enable EXYNOS4212 SoC support
+	  Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems
 
-config SOC_EXYNOS4412
-	bool "SAMSUNG EXYNOS4412"
-	default y
-	depends on ARCH_EXYNOS4
-	select ARCH_HAS_BANDGAP
-	select PINCTRL_EXYNOS
-	select SAMSUNG_DMADEV
-	help
-	  Enable EXYNOS4412 SoC support
-
-config SOC_EXYNOS5250
-	bool "SAMSUNG EXYNOS5250"
-	default y
-	depends on ARCH_EXYNOS5
-	select ARCH_HAS_BANDGAP
-	select PINCTRL_EXYNOS
-	select PM_GENERIC_DOMAINS if PM_RUNTIME
-	select S5P_DEV_MFC
-	select SAMSUNG_DMADEV
-	help
-	  Enable EXYNOS5250 SoC support
-
-config SOC_EXYNOS5420
-	bool "SAMSUNG EXYNOS5420"
-	default y
-	depends on ARCH_EXYNOS5
-	select PM_GENERIC_DOMAINS if PM_RUNTIME
-	help
-	  Enable EXYNOS5420 SoC support
+comment "EXYNOS SoCs"
 
 config SOC_EXYNOS5440
 	bool "SAMSUNG EXYNOS5440"
 	default y
 	depends on ARCH_EXYNOS5
 	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
-	select ARCH_HAS_BANDGAP
 	select ARCH_HAS_OPP
 	select HAVE_ARM_ARCH_TIMER
 	select AUTO_ZRELADDR
@@ -110,4 +52,19 @@ config SOC_EXYNOS5440
 
 endmenu
 
+config CPU_EXYNOS4210
+	bool
+
+config SOC_EXYNOS4212
+	bool
+
+config SOC_EXYNOS4412
+	bool
+
+config SOC_EXYNOS5250
+	bool
+
+config SOC_EXYNOS5420
+	bool
+
 endif
-- 
1.7.9.5

[PATCH Resend 2/3] ARM: EXYNOS: Consolidate CPU init code

[Sachin Kamat]

cpu_table was used to distinguish between different Exynos4 and 5
SoCs and based on the type do the initialization and io mapping.
exynos_init is dummy and no longer needed as we do a DT based booting.
By having a common io mapping function we can get rid of the whole
table and avoid populating it for every SoC.

Tested on Exynos4210, 5250 and 5420 based boards.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Tested-by: Tomasz Figa <t.figa@samsung.com>
---
 arch/arm/mach-exynos/common.c |  108 +++++++++--------------------------------
 1 file changed, 23 insertions(+), 85 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e98ddadc5f74..10ed374c0744 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -48,56 +48,6 @@
 #define L2_AUX_VAL 0x7C470001
 #define L2_AUX_MASK 0xC200ffff
 
-static const char name_exynos4210[] = "EXYNOS4210";
-static const char name_exynos4212[] = "EXYNOS4212";
-static const char name_exynos4412[] = "EXYNOS4412";
-static const char name_exynos5250[] = "EXYNOS5250";
-static const char name_exynos5420[] = "EXYNOS5420";
-static const char name_exynos5440[] = "EXYNOS5440";
-
-static void exynos4_map_io(void);
-static void exynos5_map_io(void);
-static int exynos_init(void);
-
-static struct cpu_table cpu_ids[] __initdata = {
-	{
-		.idcode		= EXYNOS4210_CPU_ID,
-		.idmask		= EXYNOS4_CPU_MASK,
-		.map_io		= exynos4_map_io,
-		.init		= exynos_init,
-		.name		= name_exynos4210,
-	}, {
-		.idcode		= EXYNOS4212_CPU_ID,
-		.idmask		= EXYNOS4_CPU_MASK,
-		.map_io		= exynos4_map_io,
-		.init		= exynos_init,
-		.name		= name_exynos4212,
-	}, {
-		.idcode		= EXYNOS4412_CPU_ID,
-		.idmask		= EXYNOS4_CPU_MASK,
-		.map_io		= exynos4_map_io,
-		.init		= exynos_init,
-		.name		= name_exynos4412,
-	}, {
-		.idcode		= EXYNOS5250_SOC_ID,
-		.idmask		= EXYNOS5_SOC_MASK,
-		.map_io		= exynos5_map_io,
-		.init		= exynos_init,
-		.name		= name_exynos5250,
-	}, {
-		.idcode		= EXYNOS5420_SOC_ID,
-		.idmask		= EXYNOS5_SOC_MASK,
-		.map_io		= exynos5_map_io,
-		.init		= exynos_init,
-		.name		= name_exynos5420,
-	}, {
-		.idcode		= EXYNOS5440_SOC_ID,
-		.idmask		= EXYNOS5_SOC_MASK,
-		.init		= exynos_init,
-		.name		= name_exynos5440,
-	},
-};
-
 /* Initial IO mappings */
 
 static struct map_desc exynos4_iodesc[] __initdata = {
@@ -346,6 +296,28 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
  *
  * register the standard cpu IO areas
  */
+static void __init exynos_map_io(void)
+{
+	if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
+		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
+
+	if (soc_is_exynos5250() || soc_is_exynos5420())
+		iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
+
+	if (soc_is_exynos4210()) {
+		if (samsung_rev() == EXYNOS4210_REV_0)
+			iotable_init(exynos4_iodesc0,
+						ARRAY_SIZE(exynos4_iodesc0));
+		else
+			iotable_init(exynos4_iodesc1,
+						ARRAY_SIZE(exynos4_iodesc1));
+		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
+	}
+	if (soc_is_exynos4212() || soc_is_exynos4412())
+		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
+	if (soc_is_exynos5250())
+		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
+}
 
 void __init exynos_init_io(void)
 {
@@ -356,30 +328,7 @@ void __init exynos_init_io(void)
 	/* detect cpu id and rev. */
 	s5p_init_cpu(S5P_VA_CHIPID);
 
-	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
-}
-
-static void __init exynos4_map_io(void)
-{
-	iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
-
-	if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
-		iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
-	else
-		iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
-
-	if (soc_is_exynos4210())
-		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
-	if (soc_is_exynos4212() || soc_is_exynos4412())
-		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
-}
-
-static void __init exynos5_map_io(void)
-{
-	iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
-
-	if (soc_is_exynos5250())
-		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
+	exynos_map_io();
 }
 
 struct bus_type exynos_subsys = {
@@ -387,10 +336,6 @@ struct bus_type exynos_subsys = {
 	.dev_name	= "exynos-core",
 };
 
-static struct device exynos4_dev = {
-	.bus	= &exynos_subsys,
-};
-
 static int __init exynos_core_init(void)
 {
 	return subsys_system_register(&exynos_subsys, NULL);
@@ -410,10 +355,3 @@ static int __init exynos4_l2x0_cache_init(void)
 	return 0;
 }
 early_initcall(exynos4_l2x0_cache_init);
-
-static int __init exynos_init(void)
-{
-	printk(KERN_INFO "EXYNOS: Initializing architecture\n");
-
-	return device_register(&exynos4_dev);
-}
-- 
1.7.9.5

Re: [PATCH Resend 2/3] ARM: EXYNOS: Consolidate CPU init code

[Kukjin Kim]

On 03/19/14 19:25, Sachin Kamat wrote:
> cpu_table was used to distinguish between different Exynos4 and 5
> SoCs and based on the type do the initialization and io mapping.
> exynos_init is dummy and no longer needed as we do a DT based booting.
> By having a common io mapping function we can get rid of the whole
> table and avoid populating it for every SoC.
>
> Tested on Exynos4210, 5250 and 5420 based boards.
>
> Signed-off-by: Sachin Kamat<sachin.kamat@linaro.org>
> Tested-by: Tomasz Figa<t.figa@samsung.com>
> ---
>   arch/arm/mach-exynos/common.c |  108 +++++++++--------------------------------
>   1 file changed, 23 insertions(+), 85 deletions(-)
>
> diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
> index e98ddadc5f74..10ed374c0744 100644
> --- a/arch/arm/mach-exynos/common.c
> +++ b/arch/arm/mach-exynos/common.c
> @@ -48,56 +48,6 @@
>   #define L2_AUX_VAL 0x7C470001
>   #define L2_AUX_MASK 0xC200ffff
>
> -static const char name_exynos4210[] = "EXYNOS4210";
> -static const char name_exynos4212[] = "EXYNOS4212";
> -static const char name_exynos4412[] = "EXYNOS4412";
> -static const char name_exynos5250[] = "EXYNOS5250";
> -static const char name_exynos5420[] = "EXYNOS5420";
> -static const char name_exynos5440[] = "EXYNOS5440";
> -
> -static void exynos4_map_io(void);
> -static void exynos5_map_io(void);
> -static int exynos_init(void);
> -
> -static struct cpu_table cpu_ids[] __initdata = {
> -	{
> -		.idcode		= EXYNOS4210_CPU_ID,
> -		.idmask		= EXYNOS4_CPU_MASK,
> -		.map_io		= exynos4_map_io,
> -		.init		= exynos_init,
> -		.name		= name_exynos4210,
> -	}, {
> -		.idcode		= EXYNOS4212_CPU_ID,
> -		.idmask		= EXYNOS4_CPU_MASK,
> -		.map_io		= exynos4_map_io,
> -		.init		= exynos_init,
> -		.name		= name_exynos4212,
> -	}, {
> -		.idcode		= EXYNOS4412_CPU_ID,
> -		.idmask		= EXYNOS4_CPU_MASK,
> -		.map_io		= exynos4_map_io,
> -		.init		= exynos_init,
> -		.name		= name_exynos4412,
> -	}, {
> -		.idcode		= EXYNOS5250_SOC_ID,
> -		.idmask		= EXYNOS5_SOC_MASK,
> -		.map_io		= exynos5_map_io,
> -		.init		= exynos_init,
> -		.name		= name_exynos5250,
> -	}, {
> -		.idcode		= EXYNOS5420_SOC_ID,
> -		.idmask		= EXYNOS5_SOC_MASK,
> -		.map_io		= exynos5_map_io,
> -		.init		= exynos_init,
> -		.name		= name_exynos5420,
> -	}, {
> -		.idcode		= EXYNOS5440_SOC_ID,
> -		.idmask		= EXYNOS5_SOC_MASK,
> -		.init		= exynos_init,
> -		.name		= name_exynos5440,
> -	},
> -};
> -
>   /* Initial IO mappings */
>
>   static struct map_desc exynos4_iodesc[] __initdata = {
> @@ -346,6 +296,28 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
>    *
>    * register the standard cpu IO areas
>    */
> +static void __init exynos_map_io(void)
> +{
> +	if (soc_is_exynos4210() || soc_is_exynos4212() || soc_is_exynos4412())
> +		iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
> +
> +	if (soc_is_exynos5250() || soc_is_exynos5420())
> +		iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
> +
> +	if (soc_is_exynos4210()) {
> +		if (samsung_rev() == EXYNOS4210_REV_0)
> +			iotable_init(exynos4_iodesc0,
> +						ARRAY_SIZE(exynos4_iodesc0));
> +		else
> +			iotable_init(exynos4_iodesc1,
> +						ARRAY_SIZE(exynos4_iodesc1));
> +		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
> +	}
> +	if (soc_is_exynos4212() || soc_is_exynos4412())
> +		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
> +	if (soc_is_exynos5250())
> +		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
> +}
>
>   void __init exynos_init_io(void)
>   {
> @@ -356,30 +328,7 @@ void __init exynos_init_io(void)
>   	/* detect cpu id and rev. */
>   	s5p_init_cpu(S5P_VA_CHIPID);
>
> -	s3c_init_cpu(samsung_cpu_id, cpu_ids, ARRAY_SIZE(cpu_ids));
> -}
> -
> -static void __init exynos4_map_io(void)
> -{
> -	iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
> -
> -	if (soc_is_exynos4210()&&  samsung_rev() == EXYNOS4210_REV_0)
> -		iotable_init(exynos4_iodesc0, ARRAY_SIZE(exynos4_iodesc0));
> -	else
> -		iotable_init(exynos4_iodesc1, ARRAY_SIZE(exynos4_iodesc1));
> -
> -	if (soc_is_exynos4210())
> -		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
> -	if (soc_is_exynos4212() || soc_is_exynos4412())
> -		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
> -}
> -
> -static void __init exynos5_map_io(void)
> -{
> -	iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
> -
> -	if (soc_is_exynos5250())
> -		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
> +	exynos_map_io();
>   }
>
>   struct bus_type exynos_subsys = {
> @@ -387,10 +336,6 @@ struct bus_type exynos_subsys = {
>   	.dev_name	= "exynos-core",
>   };
>
> -static struct device exynos4_dev = {
> -	.bus	=&exynos_subsys,
> -};
> -
>   static int __init exynos_core_init(void)
>   {
>   	return subsys_system_register(&exynos_subsys, NULL);
> @@ -410,10 +355,3 @@ static int __init exynos4_l2x0_cache_init(void)
>   	return 0;
>   }
>   early_initcall(exynos4_l2x0_cache_init);
> -
> -static int __init exynos_init(void)
> -{
> -	printk(KERN_INFO "EXYNOS: Initializing architecture\n");
> -
> -	return device_register(&exynos4_dev);
> -}

OK, applied this into consolidation exynos4/5 machine codes because of 
dependency.

Thanks,
Kukjin

[PATCH Resend 3/3] ARM: EXYNOS: Map SYSRAM address through DT

[Sachin Kamat]

Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
---
 .../devicetree/bindings/arm/samsung-boards.txt     |   11 +++
 arch/arm/boot/dts/exynos4210-universal_c210.dts    |    9 ++
 arch/arm/boot/dts/exynos4210.dtsi                  |   10 ++
 arch/arm/boot/dts/exynos4x12.dtsi                  |   10 ++
 arch/arm/boot/dts/exynos5.dtsi                     |    5 +
 arch/arm/boot/dts/exynos5250.dtsi                  |    5 +
 arch/arm/boot/dts/exynos5420.dtsi                  |    5 +
 arch/arm/mach-exynos/common.c                      |  104 ++++++++------------
 arch/arm/mach-exynos/include/mach/map.h            |    7 --
 9 files changed, 95 insertions(+), 71 deletions(-)

diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung-boards.txt
index 2168ed31e1b0..f79710eb7e79 100644
--- a/Documentation/devicetree/bindings/arm/samsung-boards.txt
+++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt
@@ -7,6 +7,17 @@ Required root node properties:
         (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
         (b) "samsung,exynos4210"  - for boards based on Exynos4210 SoC.
 
+    - sysram node, specifying the type (secure or non-secure) of SYSRAM
+	- compatible: following types are supported
+		"samsung,exynos4210-sysram" : Secure SYSRAM
+		"samsung,exynos4210-sysram-ns" : Non-secure SYSRAM
+	- reg: address of SYSRAM bank
+
+	sysram@02020000 {
+		compatible = "samsung,exynos4210-sysram";
+		reg = <0x02020000 0x1000>;
+	};
+
 Optional:
     - firmware node, specifying presence and type of secure firmware:
         - compatible: only "samsung,secure-firmware" is currently supported
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index d2e3f5f5916d..b893a042e3f7 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -28,6 +28,15 @@
 		bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
 	};
 
+	sysram@02020000 {
+		status = "disabled";
+	};
+
+	sysram@02025000 {
+		compatible = "samsung,exynos4210-sysram";
+		reg = <0x02025000 0x1000>;
+	};
+
 	mct@10050000 {
 		compatible = "none";
 	};
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index cb0e768dc6d4..b92982b9607e 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -31,6 +31,16 @@
 		pinctrl2 = &pinctrl_2;
 	};
 
+	sysram@02020000 {
+		compatible = "samsung,exynos4210-sysram";
+		reg = <0x02020000 0x1000>;
+	};
+
+	sysram-ns@0203F000 {
+		compatible = "samsung,exynos4210-sysram-ns";
+		reg = <0x0203F000 0x1000>;
+	};
+
 	pd_lcd1: lcd1-power-domain@10023CA0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index c4a9306f8529..d57e3120223f 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -37,6 +37,16 @@
 		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
 	};
 
+	sysram@02020000 {
+		compatible = "samsung,exynos4210-sysram";
+		reg = <0x02020000 0x1000>;
+	};
+
+	sysram-ns@0204F000 {
+		compatible = "samsung,exynos4210-sysram-ns";
+		reg = <0x0204F000 0x1000>;
+	};
+
 	pd_isp: isp-power-domain@10023CA0 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10023CA0 0x20>;
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
index 79d0608d6dcc..c03bd09ec37d 100644
--- a/arch/arm/boot/dts/exynos5.dtsi
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -18,6 +18,11 @@
 / {
 	interrupt-parent = <&gic>;
 
+	sysram@02020000 {
+		compatible = "samsung,exynos4210-sysram";
+		reg = <0x02020000 0x1000>;
+	};
+
 	chipid@10000000 {
 		compatible = "samsung,exynos4210-chipid";
 		reg = <0x10000000 0x100>;
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index fdeed7c29ac9..abfceadbb1ea 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -72,6 +72,11 @@
 		};
 	};
 
+	sysram-ns@0204F000 {
+		compatible = "samsung,exynos4210-sysram-ns";
+		reg = <0x0204F000 0x1000>;
+	};
+
 	pd_gsc: gsc-power-domain@10044000 {
 		compatible = "samsung,exynos4210-pd";
 		reg = <0x10044000 0x20>;
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 82071154eb84..ea401d3b58e3 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -110,6 +110,11 @@
 		};
 	};
 
+	sysram-ns@02073000 {
+		compatible = "samsung,exynos4210-sysram-ns";
+		reg = <0x02073000 0x1000>;
+	};
+
 	clock: clock-controller@10010000 {
 		compatible = "samsung,exynos5420-clock";
 		reg = <0x10010000 0x30000>;
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 10ed374c0744..d9ae5cd49194 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -129,51 +129,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
 	},
 };
 
-static struct map_desc exynos4_iodesc0[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_SYSRAM,
-		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static struct map_desc exynos4_iodesc1[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_SYSRAM,
-		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static struct map_desc exynos4210_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
-		.pfn		= __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static struct map_desc exynos4x12_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
-		.pfn		= __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
-static struct map_desc exynos5250_iodesc[] __initdata = {
-	{
-		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
-		.pfn		= __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	},
-};
-
 static struct map_desc exynos5_iodesc[] __initdata = {
 	{
 		.virtual	= (unsigned long)S3C_VA_SYS,
@@ -196,11 +151,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
 		.length		= SZ_4K,
 		.type		= MT_DEVICE,
 	}, {
-		.virtual	= (unsigned long)S5P_VA_SYSRAM,
-		.pfn		= __phys_to_pfn(EXYNOS5_PA_SYSRAM),
-		.length		= SZ_4K,
-		.type		= MT_DEVICE,
-	}, {
 		.virtual	= (unsigned long)S5P_VA_CMU,
 		.pfn		= __phys_to_pfn(EXYNOS5_PA_CMU),
 		.length		= 144 * SZ_1K,
@@ -291,6 +241,44 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
 	return 1;
 }
 
+struct __sysram_desc {
+	char name[32];
+	unsigned long addr;
+};
+
+static struct __sysram_desc sysram_desc[] __initdata = {
+	{
+		.name = "samsung,exynos4210-sysram",
+		.addr = (unsigned long)S5P_VA_SYSRAM,
+	}, {
+		.name = "samsung,exynos4210-sysram-ns",
+		.addr = (unsigned long)S5P_VA_SYSRAM_NS,
+	},
+};
+
+static int __init exynos_fdt_map_sysram(unsigned long node, const char *uname,
+					int depth, void *data)
+{
+	struct map_desc iodesc;
+	__be32 *reg;
+	unsigned long len;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(sysram_desc); i++) {
+		if (of_flat_dt_is_compatible(node, sysram_desc[i].name)) {
+			reg = of_get_flat_dt_prop(node, "reg", &len);
+			if (!reg || len != (sizeof(unsigned long) * 2))
+				return -ENODEV;
+			iodesc.virtual = sysram_desc[i].addr;
+			iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
+			iodesc.length = be32_to_cpu(reg[1]);
+			iodesc.type = MT_DEVICE;
+			iotable_init(&iodesc, 1);
+		}
+	}
+	return 0;
+}
+
 /*
  * exynos_map_io
  *
@@ -303,20 +291,6 @@ static void __init exynos_map_io(void)
 
 	if (soc_is_exynos5250() || soc_is_exynos5420())
 		iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
-
-	if (soc_is_exynos4210()) {
-		if (samsung_rev() == EXYNOS4210_REV_0)
-			iotable_init(exynos4_iodesc0,
-						ARRAY_SIZE(exynos4_iodesc0));
-		else
-			iotable_init(exynos4_iodesc1,
-						ARRAY_SIZE(exynos4_iodesc1));
-		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
-	}
-	if (soc_is_exynos4212() || soc_is_exynos4412())
-		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
-	if (soc_is_exynos5250())
-		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
 }
 
 void __init exynos_init_io(void)
@@ -329,6 +303,8 @@ void __init exynos_init_io(void)
 	s5p_init_cpu(S5P_VA_CHIPID);
 
 	exynos_map_io();
+
+	of_scan_flat_dt(exynos_fdt_map_sysram, NULL);
 }
 
 struct bus_type exynos_subsys = {
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index 7b046b59d9ec..548269a60634 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -23,13 +23,6 @@
 
 #include <plat/map-s5p.h>
 
-#define EXYNOS4_PA_SYSRAM0		0x02025000
-#define EXYNOS4_PA_SYSRAM1		0x02020000
-#define EXYNOS5_PA_SYSRAM		0x02020000
-#define EXYNOS4210_PA_SYSRAM_NS		0x0203F000
-#define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
-#define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
-
 #define EXYNOS_PA_CHIPID		0x10000000
 
 #define EXYNOS4_PA_SYSCON		0x10010000
-- 
1.7.9.5

Re: [PATCH Resend 3/3] ARM: EXYNOS: Map SYSRAM address through DT

[Chanwoo Choi]

Hi Sachin,

I want to use this patch to remove static SYSRAM memory mapping for Exynos3250.
But this patch has conflict on 3.15-rc1 base.
Do you have a plan to resend this patch?

Thanks,
Chanwoo Choi

On 03/19/2014 07:25 PM, Sachin Kamat wrote:
> Instead of hardcoding the SYSRAM details for each SoC,
> pass this information through device tree (DT) and make
> the code SoC agnostic.
> 
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> ---
>  .../devicetree/bindings/arm/samsung-boards.txt     |   11 +++
>  arch/arm/boot/dts/exynos4210-universal_c210.dts    |    9 ++
>  arch/arm/boot/dts/exynos4210.dtsi                  |   10 ++
>  arch/arm/boot/dts/exynos4x12.dtsi                  |   10 ++
>  arch/arm/boot/dts/exynos5.dtsi                     |    5 +
>  arch/arm/boot/dts/exynos5250.dtsi                  |    5 +
>  arch/arm/boot/dts/exynos5420.dtsi                  |    5 +
>  arch/arm/mach-exynos/common.c                      |  104 ++++++++------------
>  arch/arm/mach-exynos/include/mach/map.h            |    7 --
>  9 files changed, 95 insertions(+), 71 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/arm/samsung-boards.txt b/Documentation/devicetree/bindings/arm/samsung-boards.txt
> index 2168ed31e1b0..f79710eb7e79 100644
> --- a/Documentation/devicetree/bindings/arm/samsung-boards.txt
> +++ b/Documentation/devicetree/bindings/arm/samsung-boards.txt
> @@ -7,6 +7,17 @@ Required root node properties:
>          (a) "samsung,smdkv310" - for Samsung's SMDKV310 eval board.
>          (b) "samsung,exynos4210"  - for boards based on Exynos4210 SoC.
>  
> +    - sysram node, specifying the type (secure or non-secure) of SYSRAM
> +	- compatible: following types are supported
> +		"samsung,exynos4210-sysram" : Secure SYSRAM
> +		"samsung,exynos4210-sysram-ns" : Non-secure SYSRAM
> +	- reg: address of SYSRAM bank
> +
> +	sysram@02020000 {
> +		compatible = "samsung,exynos4210-sysram";
> +		reg = <0x02020000 0x1000>;
> +	};
> +
>  Optional:
>      - firmware node, specifying presence and type of secure firmware:
>          - compatible: only "samsung,secure-firmware" is currently supported
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index d2e3f5f5916d..b893a042e3f7 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -28,6 +28,15 @@
>  		bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
>  	};
>  
> +	sysram@02020000 {
> +		status = "disabled";
> +	};
> +
> +	sysram@02025000 {
> +		compatible = "samsung,exynos4210-sysram";
> +		reg = <0x02025000 0x1000>;
> +	};
> +
>  	mct@10050000 {
>  		compatible = "none";
>  	};
> diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
> index cb0e768dc6d4..b92982b9607e 100644
> --- a/arch/arm/boot/dts/exynos4210.dtsi
> +++ b/arch/arm/boot/dts/exynos4210.dtsi
> @@ -31,6 +31,16 @@
>  		pinctrl2 = &pinctrl_2;
>  	};
>  
> +	sysram@02020000 {
> +		compatible = "samsung,exynos4210-sysram";
> +		reg = <0x02020000 0x1000>;
> +	};
> +
> +	sysram-ns@0203F000 {
> +		compatible = "samsung,exynos4210-sysram-ns";
> +		reg = <0x0203F000 0x1000>;
> +	};
> +
>  	pd_lcd1: lcd1-power-domain@10023CA0 {
>  		compatible = "samsung,exynos4210-pd";
>  		reg = <0x10023CA0 0x20>;
> diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
> index c4a9306f8529..d57e3120223f 100644
> --- a/arch/arm/boot/dts/exynos4x12.dtsi
> +++ b/arch/arm/boot/dts/exynos4x12.dtsi
> @@ -37,6 +37,16 @@
>  		interrupts = <2 2>, <3 2>, <18 2>, <19 2>;
>  	};
>  
> +	sysram@02020000 {
> +		compatible = "samsung,exynos4210-sysram";
> +		reg = <0x02020000 0x1000>;
> +	};
> +
> +	sysram-ns@0204F000 {
> +		compatible = "samsung,exynos4210-sysram-ns";
> +		reg = <0x0204F000 0x1000>;
> +	};
> +
>  	pd_isp: isp-power-domain@10023CA0 {
>  		compatible = "samsung,exynos4210-pd";
>  		reg = <0x10023CA0 0x20>;
> diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
> index 79d0608d6dcc..c03bd09ec37d 100644
> --- a/arch/arm/boot/dts/exynos5.dtsi
> +++ b/arch/arm/boot/dts/exynos5.dtsi
> @@ -18,6 +18,11 @@
>  / {
>  	interrupt-parent = <&gic>;
>  
> +	sysram@02020000 {
> +		compatible = "samsung,exynos4210-sysram";
> +		reg = <0x02020000 0x1000>;
> +	};
> +
>  	chipid@10000000 {
>  		compatible = "samsung,exynos4210-chipid";
>  		reg = <0x10000000 0x100>;
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
> index fdeed7c29ac9..abfceadbb1ea 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -72,6 +72,11 @@
>  		};
>  	};
>  
> +	sysram-ns@0204F000 {
> +		compatible = "samsung,exynos4210-sysram-ns";
> +		reg = <0x0204F000 0x1000>;
> +	};
> +
>  	pd_gsc: gsc-power-domain@10044000 {
>  		compatible = "samsung,exynos4210-pd";
>  		reg = <0x10044000 0x20>;
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index 82071154eb84..ea401d3b58e3 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -110,6 +110,11 @@
>  		};
>  	};
>  
> +	sysram-ns@02073000 {
> +		compatible = "samsung,exynos4210-sysram-ns";
> +		reg = <0x02073000 0x1000>;
> +	};
> +
>  	clock: clock-controller@10010000 {
>  		compatible = "samsung,exynos5420-clock";
>  		reg = <0x10010000 0x30000>;
> diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
> index 10ed374c0744..d9ae5cd49194 100644
> --- a/arch/arm/mach-exynos/common.c
> +++ b/arch/arm/mach-exynos/common.c
> @@ -129,51 +129,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
>  	},
>  };
>  
> -static struct map_desc exynos4_iodesc0[] __initdata = {
> -	{
> -		.virtual	= (unsigned long)S5P_VA_SYSRAM,
> -		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM0),
> -		.length		= SZ_4K,
> -		.type		= MT_DEVICE,
> -	},
> -};
> -
> -static struct map_desc exynos4_iodesc1[] __initdata = {
> -	{
> -		.virtual	= (unsigned long)S5P_VA_SYSRAM,
> -		.pfn		= __phys_to_pfn(EXYNOS4_PA_SYSRAM1),
> -		.length		= SZ_4K,
> -		.type		= MT_DEVICE,
> -	},
> -};
> -
> -static struct map_desc exynos4210_iodesc[] __initdata = {
> -	{
> -		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
> -		.pfn		= __phys_to_pfn(EXYNOS4210_PA_SYSRAM_NS),
> -		.length		= SZ_4K,
> -		.type		= MT_DEVICE,
> -	},
> -};
> -
> -static struct map_desc exynos4x12_iodesc[] __initdata = {
> -	{
> -		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
> -		.pfn		= __phys_to_pfn(EXYNOS4x12_PA_SYSRAM_NS),
> -		.length		= SZ_4K,
> -		.type		= MT_DEVICE,
> -	},
> -};
> -
> -static struct map_desc exynos5250_iodesc[] __initdata = {
> -	{
> -		.virtual	= (unsigned long)S5P_VA_SYSRAM_NS,
> -		.pfn		= __phys_to_pfn(EXYNOS5250_PA_SYSRAM_NS),
> -		.length		= SZ_4K,
> -		.type		= MT_DEVICE,
> -	},
> -};
> -
>  static struct map_desc exynos5_iodesc[] __initdata = {
>  	{
>  		.virtual	= (unsigned long)S3C_VA_SYS,
> @@ -196,11 +151,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
>  		.length		= SZ_4K,
>  		.type		= MT_DEVICE,
>  	}, {
> -		.virtual	= (unsigned long)S5P_VA_SYSRAM,
> -		.pfn		= __phys_to_pfn(EXYNOS5_PA_SYSRAM),
> -		.length		= SZ_4K,
> -		.type		= MT_DEVICE,
> -	}, {
>  		.virtual	= (unsigned long)S5P_VA_CMU,
>  		.pfn		= __phys_to_pfn(EXYNOS5_PA_CMU),
>  		.length		= 144 * SZ_1K,
> @@ -291,6 +241,44 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
>  	return 1;
>  }
>  
> +struct __sysram_desc {
> +	char name[32];
> +	unsigned long addr;
> +};
> +
> +static struct __sysram_desc sysram_desc[] __initdata = {
> +	{
> +		.name = "samsung,exynos4210-sysram",
> +		.addr = (unsigned long)S5P_VA_SYSRAM,
> +	}, {
> +		.name = "samsung,exynos4210-sysram-ns",
> +		.addr = (unsigned long)S5P_VA_SYSRAM_NS,
> +	},
> +};
> +
> +static int __init exynos_fdt_map_sysram(unsigned long node, const char *uname,
> +					int depth, void *data)
> +{
> +	struct map_desc iodesc;
> +	__be32 *reg;
> +	unsigned long len;
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(sysram_desc); i++) {
> +		if (of_flat_dt_is_compatible(node, sysram_desc[i].name)) {
> +			reg = of_get_flat_dt_prop(node, "reg", &len);
> +			if (!reg || len != (sizeof(unsigned long) * 2))
> +				return -ENODEV;
> +			iodesc.virtual = sysram_desc[i].addr;
> +			iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0]));
> +			iodesc.length = be32_to_cpu(reg[1]);
> +			iodesc.type = MT_DEVICE;
> +			iotable_init(&iodesc, 1);
> +		}
> +	}
> +	return 0;
> +}
> +
>  /*
>   * exynos_map_io
>   *
> @@ -303,20 +291,6 @@ static void __init exynos_map_io(void)
>  
>  	if (soc_is_exynos5250() || soc_is_exynos5420())
>  		iotable_init(exynos5_iodesc, ARRAY_SIZE(exynos5_iodesc));
> -
> -	if (soc_is_exynos4210()) {
> -		if (samsung_rev() == EXYNOS4210_REV_0)
> -			iotable_init(exynos4_iodesc0,
> -						ARRAY_SIZE(exynos4_iodesc0));
> -		else
> -			iotable_init(exynos4_iodesc1,
> -						ARRAY_SIZE(exynos4_iodesc1));
> -		iotable_init(exynos4210_iodesc, ARRAY_SIZE(exynos4210_iodesc));
> -	}
> -	if (soc_is_exynos4212() || soc_is_exynos4412())
> -		iotable_init(exynos4x12_iodesc, ARRAY_SIZE(exynos4x12_iodesc));
> -	if (soc_is_exynos5250())
> -		iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
>  }
>  
>  void __init exynos_init_io(void)
> @@ -329,6 +303,8 @@ void __init exynos_init_io(void)
>  	s5p_init_cpu(S5P_VA_CHIPID);
>  
>  	exynos_map_io();
> +
> +	of_scan_flat_dt(exynos_fdt_map_sysram, NULL);
>  }
>  
>  struct bus_type exynos_subsys = {
> diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
> index 7b046b59d9ec..548269a60634 100644
> --- a/arch/arm/mach-exynos/include/mach/map.h
> +++ b/arch/arm/mach-exynos/include/mach/map.h
> @@ -23,13 +23,6 @@
>  
>  #include <plat/map-s5p.h>
>  
> -#define EXYNOS4_PA_SYSRAM0		0x02025000
> -#define EXYNOS4_PA_SYSRAM1		0x02020000
> -#define EXYNOS5_PA_SYSRAM		0x02020000
> -#define EXYNOS4210_PA_SYSRAM_NS		0x0203F000
> -#define EXYNOS4x12_PA_SYSRAM_NS		0x0204F000
> -#define EXYNOS5250_PA_SYSRAM_NS		0x0204F000
> -
>  #define EXYNOS_PA_CHIPID		0x10000000
>  
>  #define EXYNOS4_PA_SYSCON		0x10010000
> 

Re: [PATCH Resend 3/3] ARM: EXYNOS: Map SYSRAM address through DT

[Sachin Kamat]

Hi Chanwoo,

On 16 April 2014 16:36, Chanwoo Choi <cw00.choi@samsung.com> wrote:
> Hi Sachin,
>
> I want to use this patch to remove static SYSRAM memory mapping for Exynos3250.
> But this patch has conflict on 3.15-rc1 base.
> Do you have a plan to resend this patch?

Rebased and resent (CC'd you). Please let me have your tested-by on it.

---
With warm regards,
Sachin

RE: [PATCH Resend 1/3] ARM: EXYNOS: Consolidate Kconfig entries

[Kukjin Kim]

Sachin Kamat wrote:
> 
> Instead of repeating the Kconfig entries for every SoC, move them under
> ARCH_EXYNOS4 and 5 and move the entries common to both 4 and 5 under
> ARCH_EXYNOS. Also, since the individual SoCs do not have any specific
> machine/platform code, keep them as boolean symbols instead of user
> selectable and select them from Exynos4 and 5 config symbols. Individual
> SoC symbols can be removed eventually once the driver Kconfig dependencies
> on these symbols are removed.
> 
> Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> Acked-by: Tomasz Figa <t.figa@samsung.com>
> ---
> This is a resend of the series rebased on top of latest linux-next and
> Tomasz Figa's PM consolidation series 1 and 2.
> ---
>  arch/arm/Kconfig             |   10 +++++
>  arch/arm/mach-exynos/Kconfig |   89
+++++++++++---------------------------
> ----
>  2 files changed, 33 insertions(+), 66 deletions(-)
> 
Hmm...I'm still thinking whether we don't need to select some specific
Exynos SoCs. Because actually we're implement/develop some features based on
mainline kernel and sometimes the features are not valid on all of Exynos4
or Exynos5. Even though they are not in mainline, for mass product it's true
that Samsung needs to do it. It's another thing we have a plan for them or
not.

So in my opinion, basically consolidation something is usually good but it's
not always good so we need to provide a way to use one of both.

Thanks,
Kukjin

RE: [PATCH Resend 1/3] ARM: EXYNOS: Consolidate Kconfig entries

[Kukjin Kim]

Kukjin Kim wrote:
> 
> Sachin Kamat wrote:
> >
> > Instead of repeating the Kconfig entries for every SoC, move them under
> > ARCH_EXYNOS4 and 5 and move the entries common to both 4 and 5 under
> > ARCH_EXYNOS. Also, since the individual SoCs do not have any specific
> > machine/platform code, keep them as boolean symbols instead of user
> > selectable and select them from Exynos4 and 5 config symbols. Individual
> > SoC symbols can be removed eventually once the driver Kconfig dependencies
> > on these symbols are removed.
> >
> > Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
> > Acked-by: Tomasz Figa <t.figa@samsung.com>
> > ---
> > This is a resend of the series rebased on top of latest linux-next and
> > Tomasz Figa's PM consolidation series 1 and 2.
> > ---
> >  arch/arm/Kconfig             |   10 +++++
> >  arch/arm/mach-exynos/Kconfig |   89
> +++++++++++---------------------------
> > ----
> >  2 files changed, 33 insertions(+), 66 deletions(-)
> >
> Hmm...I'm still thinking whether we don't need to select some specific
> Exynos SoCs. Because actually we're implement/develop some features based on
> mainline kernel and sometimes the features are not valid on all of Exynos4
> or Exynos5. Even though they are not in mainline, for mass product it's true
> that Samsung needs to do it. It's another thing we have a plan for them or
> not.

Mainline upstreaming plan.

> 
> So in my opinion, basically consolidation something is usually good but it's
> not always good so we need to provide a way to use one of both.
> 

- Kukjin