Re: [PATCH 3/7] drm/mediatek: Add TDSHP component support for MT8196

AngeloGioacchino Del Regno
2025-02-19T12:37:56Z

Il 19/02/25 10:20, Jay Liu ha scritto:
> Add TDSHP component support for MT8196.
> TDSHP is a hardware module designed to enhance the sharpness and
> clarity of displayed images by analyzing and improving edges and
> fine details in frames.
>
> Signed-off-by: Jay Liu <jay.liu@mediatek.com>
> ---
> drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 58 +++++++++++++++++++++++++
> drivers/gpu/drm/mediatek/mtk_ddp_comp.h | 1 +
> drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +
> 3 files changed, 61 insertions(+)
>
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index d7e230bac53e..b87fde64ee49 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -57,6 +57,16 @@
> #define POSTMASK_RELAY_MODE BIT(0)
> #define DISP_REG_POSTMASK_SIZE 0x0030
>
> +#define DISP_REG_TDSHP_EN 0x0000
> +#define DISP_TDSHP_TDS_EN BIT(31)
> +#define DISP_REG_TDSHP_CTRL 0x0100
> +#define DISP_TDSHP_CTRL_EN BIT(0)
> +#define DISP_TDSHP_PWR_SCL_EN BIT(2)
> +#define DISP_REG_TDSHP_CFG 0x0110

#define TDSHP_RELAY_MODE BIT(0)

> +#define DISP_REG_TDSHP_INPUT_SIZE 0x0120
> +#define DISP_REG_TDSHP_OUTPUT_OFFSET 0x0124
> +#define DISP_REG_TDSHP_OUTPUT_SIZE 0x0128
> +
> #define DISP_REG_UFO_START 0x0000
> #define UFO_BYPASS BIT(2)
>
> @@ -261,6 +271,44 @@ static void mtk_postmask_stop(struct device *dev)
> writel_relaxed(0x0, priv->regs + DISP_REG_POSTMASK_EN);
> }
>
> +static void mtk_disp_tdshp_config(struct device *dev, unsigned int w,
> + unsigned int h, unsigned int vrefresh,
> + unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> + u32 tdshp_ctrl = (bpc == 8) ? DISP_TDSHP_PWR_SCL_EN | DISP_TDSHP_CTRL_EN : 0;
> +
> + mtk_ddp_write(cmdq_pkt, tdshp_ctrl, &priv->cmdq_reg, priv->regs,
> + DISP_REG_TDSHP_CTRL);
> +
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,
> + DISP_REG_TDSHP_INPUT_SIZE);
> + mtk_ddp_write(cmdq_pkt, w << 16 | h, &priv->cmdq_reg, priv->regs,
> + DISP_REG_TDSHP_OUTPUT_SIZE);
> + mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs,
> + DISP_REG_TDSHP_OUTPUT_OFFSET);
> +
> + mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg,

mtk_ddp_write(cmdq_pkt, TDSHP_RELAY_MODE, ... etc etc

> + priv->regs, DISP_REG_TDSHP_CFG);
> +
> + mtk_ddp_write_mask(cmdq_pkt, DISP_TDSHP_TDS_EN, &priv->cmdq_reg, priv->regs,
> + DISP_REG_TDSHP_EN, DISP_TDSHP_TDS_EN);
> +}
> +
> +static void mtk_disp_tdshp_start(struct device *dev)
> +{
> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +
> + writel(DISP_TDSHP_CTRL_EN, priv->regs + DISP_REG_TDSHP_CTRL);
> +}
> +
> +static void mtk_disp_tdshp_stop(struct device *dev)
> +{
> + struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +
> + writel(0x0, priv->regs + DISP_REG_TDSHP_CTRL);

writel(0, priv->regs + DISP_REG_TDSHP_CTRL);

> +}
> +

After which:

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>