From: Hui-Ping Chen <hpchen0nvt@gmail.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: richard@nod.at, vigneshr@ti.com, robh@kernel.org,
krzk+dt@kernel.org, conor+dt@kernel.org,
nikita.shubin@maquefel.me, arnd@arndb.de, vkoul@kernel.org,
esben@geanix.com, linux-arm-kernel@lists.infradead.org,
linux-mtd@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 2/2] mtd: rawnand: nuvoton: add new driver for the Nuvoton MA35 SoC
Date: Fri, 11 Oct 2024 08:31:41 +0800 [thread overview]
Message-ID: <037102f1-3e8d-4b76-a9d2-a23fde7a502a@gmail.com> (raw)
In-Reply-To: <20241009100450.362e3556@xps-13>
Dear Miquel,
Thank you for your reply.
On 2024/10/9 下午 04:04, Miquel Raynal wrote:
> Hi Hui-Ping,
>
>>>>>> + return 0;
>>>>>> + }
>>>>>> +
>>>>>> + ma35_nand_dmac_init(nand);
>>>>>> +
>>>>>> + writel(mtd->oobsize, nand->regs + MA35_NFI_REG_NANDRACTL);
>>>>>> +
>>>>>> + /* setup and start DMA using dma_addr */
>>>>>> + dma_addr = dma_map_single(nand->dev, (void *)addr, len, DMA_FROM_DEVICE);
>>>>>> + ret = dma_mapping_error(nand->dev, dma_addr);
>>>>>> + if (ret) {
>>>>>> + dev_err(nand->dev, "dma mapping error\n");
>>>>>> + return -EINVAL;
>>>>>> + }
>>>>>> +
>>>>>> + writel((unsigned long)dma_addr, nand->regs + MA35_NFI_REG_DMASA);
>>>>> Please enforce a dma mask of 32 (even though it might be the fault).
>>>> I will change it to dma_addr & 0xffffffff.
>>> That's not what I mean, I believe you should use the dma API to ask for
>>> a mapping within the accessible 32-bit address range. The
>>> dma_mapping_error() check should return an error if that's not the
>>> case. Then you can safely write the value.
>> Here is my misunderstanding: just fill in the dma_addr directly,
>>
>> no type conversion is needed. I have already tested it.
> FYI, it only works because the default DMA mask for your device is gonna
> be 32 bits. If the reality (what your peripheral DMA can do) was
> different than this, you would have to set a different mask explicitly
> to make sure the dma-mapping step would not provide buffers which are
> out of reach.
Sure, I will keep that in mind. However, due to the memory architecture
of the MA35,
which is designed for a maximum of 4GB, there won’t be any situation
exceeding 32 bits.
Thank you.
> Thanks,
> Miquèl
Best regards,
Hui-Ping Chen
prev parent reply other threads:[~2024-10-11 0:31 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-27 2:07 [PATCH v6 0/2] Add support for nuvoton ma35 nand controller Hui-Ping Chen
2024-09-27 2:07 ` [PATCH v6 1/2] dt-bindings: mtd: nuvoton,ma35d1-nand: add new bindings Hui-Ping Chen
2024-10-01 10:19 ` Miquel Raynal
2024-10-08 2:30 ` Hui-Ping Chen
2024-09-27 2:07 ` [PATCH v6 2/2] mtd: rawnand: nuvoton: add new driver for the Nuvoton MA35 SoC Hui-Ping Chen
2024-10-01 19:57 ` Miquel Raynal
2024-10-08 3:19 ` Hui-Ping Chen
2024-10-08 8:52 ` Miquel Raynal
2024-10-09 0:55 ` Hui-Ping Chen
2024-10-09 8:04 ` Miquel Raynal
2024-10-11 0:31 ` Hui-Ping Chen [this message]
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