devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Matthias Brugger <matthias.bgg@gmail.com>
To: Weiyi Lu <weiyi.lu@mediatek.com>, Rob Herring <robh@kernel.org>,
	Nicolas Boichat <drinkcat@chromium.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org,
	linux-clk@vger.kernel.org, srv_heupstream@mediatek.com,
	Project_Global_Chrome_Upstream_Group@mediatek.com
Subject: Re: [PATCH 2/2] arm64: dts: mediatek: Correct UART0 bus clock of MT8192
Date: Sun, 31 Jan 2021 14:29:43 +0100	[thread overview]
Message-ID: <03eed306-c9f3-96ed-208d-24a2017b2d3d@gmail.com> (raw)
In-Reply-To: <1608644414-17793-3-git-send-email-weiyi.lu@mediatek.com>



On 22/12/2020 14:40, Weiyi Lu wrote:
> infra_uart0 clock is the real one what uart0 uses as bus clock.
> 
> Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
> ---
>  arch/arm64/boot/dts/mediatek/mt8192.dtsi | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> index 92dcfbd..ac5dca6 100644
> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
> @@ -283,7 +283,7 @@
>  				     "mediatek,mt6577-uart";
>  			reg = <0 0x11002000 0 0x1000>;
>  			interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 0>;
> -			clocks = <&clk26m>, <&clk26m>;
> +			clocks = <&clk26m>, <&infracfg CLK_INFRA_UART0>;

Please update the clocks for all nodes to use the clock driver, not just uart or
uart0.

Thanks,
Matthias

>  			clock-names = "baud", "bus";
>  			status = "disabled";
>  		};
> 

  reply	other threads:[~2021-01-31 15:24 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-22 13:40 [PATCH 0/2] Add MediaTek MT8192 clock provider device nodes Weiyi Lu
2020-12-22 13:40 ` [PATCH 1/2] arm64: dts: mediatek: Add mt8192 clock controllers Weiyi Lu
2020-12-22 13:40 ` [PATCH 2/2] arm64: dts: mediatek: Correct UART0 bus clock of MT8192 Weiyi Lu
2021-01-31 13:29   ` Matthias Brugger [this message]
     [not found] ` <4536e0a3-8e64-d2b0-df83-33705d10359a@gmail.com>
2021-02-01  9:31   ` [PATCH 0/2] Add MediaTek MT8192 clock provider device nodes Weiyi Lu
2021-02-01 10:15     ` Matthias Brugger

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=03eed306-c9f3-96ed-208d-24a2017b2d3d@gmail.com \
    --to=matthias.bgg@gmail.com \
    --cc=Project_Global_Chrome_Upstream_Group@mediatek.com \
    --cc=devicetree@vger.kernel.org \
    --cc=drinkcat@chromium.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mediatek@lists.infradead.org \
    --cc=robh@kernel.org \
    --cc=srv_heupstream@mediatek.com \
    --cc=weiyi.lu@mediatek.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).