* [PATCH 0/2] clk: visconti: Add support for VIIF on Toshiba Visconti TMPV770x SoC
@ 2025-10-16 1:33 Yuji Ishikawa
2025-10-16 1:33 ` [PATCH 1/2] dt-bindings: clock: Update identifiers " Yuji Ishikawa
2025-10-16 1:33 ` [PATCH 2/2] clk: visconti: Add definition of " Yuji Ishikawa
0 siblings, 2 replies; 5+ messages in thread
From: Yuji Ishikawa @ 2025-10-16 1:33 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Nobuhiro Iwamatsu, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Yuji Ishikawa
Cc: linux-clk, linux-arm-kernel, linux-kernel, devicetree
This series adds support for Video Input Interface (VIIF) module to the
clock and reset driver of Toshiba Visconti TMPV770x SoC. It provides the
definition of identifiers for clocks and resets, and the control sequence
of registers.
Yuji Ishikawa (2):
dt-bindings: clock: Update identifiers for VIIF on Toshiba Visconti
TMPV770x SoC
clk: visconti: Add definition of VIIF on Toshiba Visconti TMPV770x SoC
drivers/clk/visconti/clkc-tmpv770x.c | 71 ++++++++++++++++++++
include/dt-bindings/clock/toshiba,tmpv770x.h | 33 ++++++---
include/dt-bindings/reset/toshiba,tmpv770x.h | 10 ++-
3 files changed, 102 insertions(+), 12 deletions(-)
--
2.43.0
^ permalink raw reply [flat|nested] 5+ messages in thread* [PATCH 1/2] dt-bindings: clock: Update identifiers for VIIF on Toshiba Visconti TMPV770x SoC 2025-10-16 1:33 [PATCH 0/2] clk: visconti: Add support for VIIF on Toshiba Visconti TMPV770x SoC Yuji Ishikawa @ 2025-10-16 1:33 ` Yuji Ishikawa 2025-10-16 6:41 ` Krzysztof Kozlowski 2025-10-16 1:33 ` [PATCH 2/2] clk: visconti: Add definition of " Yuji Ishikawa 1 sibling, 1 reply; 5+ messages in thread From: Yuji Ishikawa @ 2025-10-16 1:33 UTC (permalink / raw) To: Michael Turquette, Stephen Boyd, Nobuhiro Iwamatsu, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Yuji Ishikawa Cc: linux-clk, linux-arm-kernel, linux-kernel, devicetree Update identifiers for the clocks and the resets of Video Input Interface in order to reflect the actual architecture of TMPV770x SoC. Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> --- include/dt-bindings/clock/toshiba,tmpv770x.h | 33 +++++++++++++------- include/dt-bindings/reset/toshiba,tmpv770x.h | 10 +++++- 2 files changed, 31 insertions(+), 12 deletions(-) diff --git a/include/dt-bindings/clock/toshiba,tmpv770x.h b/include/dt-bindings/clock/toshiba,tmpv770x.h index 5fce713001..2dbd5885c0 100644 --- a/include/dt-bindings/clock/toshiba,tmpv770x.h +++ b/include/dt-bindings/clock/toshiba,tmpv770x.h @@ -94,10 +94,10 @@ #define TMPV770X_CLK_DSP2_PBCLK 77 #define TMPV770X_CLK_DSP3_PBCLK 78 #define TMPV770X_CLK_DSVIIF0_APBCLK 79 -#define TMPV770X_CLK_VIIF0_APBCLK 80 -#define TMPV770X_CLK_VIIF0_CFGCLK 81 -#define TMPV770X_CLK_VIIF1_APBCLK 82 -#define TMPV770X_CLK_VIIF1_CFGCLK 83 +#define TMPV770X_CLK_VIIFBS0_APB 80 +#define TMPV770X_CLK_VIIFBS0_CFG 81 +#define TMPV770X_CLK_VIIFBS1_APB 82 +#define TMPV770X_CLK_VIIFBS1_CFG 83 #define TMPV770X_CLK_VIIF2_APBCLK 84 #define TMPV770X_CLK_VIIF2_CFGCLK 85 #define TMPV770X_CLK_VIIF3_APBCLK 86 @@ -121,11 +121,11 @@ #define TMPV770X_CLK_PYRAMID 104 #define TMPV770X_CLK_HWA2_ASYNC 105 #define TMPV770X_CLK_DSP0 106 -#define TMPV770X_CLK_VIIFBS0 107 -#define TMPV770X_CLK_VIIFBS0_L2ISP 108 -#define TMPV770X_CLK_VIIFBS0_L1ISP 109 -#define TMPV770X_CLK_VIIFBS0_PROC 110 -#define TMPV770X_CLK_VIIFBS1 111 +#define TMPV770X_CLK_VIIFBS0_PROC 107 +#define TMPV770X_CLK_VIIF0_L2ISP 108 +#define TMPV770X_CLK_VIIF0_L1ISP 109 +#define TMPV770X_CLK_VIIF0_PROC 110 +#define TMPV770X_CLK_VIIFBS1_PROC 111 #define TMPV770X_CLK_VIIFBS2 112 #define TMPV770X_CLK_VIIFOP_MBUS 113 #define TMPV770X_CLK_VIIFOP0_PROC 114 @@ -141,7 +141,10 @@ #define TMPV770X_CLK_PIREFCLK 124 #define TMPV770X_CLK_SBUS 125 #define TMPV770X_CLK_BUSLCK 126 -#define TMPV770X_NR_CLK 127 +#define TMPV770X_CLK_VIIF1_L2ISP 127 +#define TMPV770X_CLK_VIIF1_L1ISP 128 +#define TMPV770X_CLK_VIIF1_PROC 129 +#define TMPV770X_NR_CLK 130 /* Reset */ #define TMPV770X_RESET_PIETHER_2P5M 0 @@ -176,6 +179,14 @@ #define TMPV770X_RESET_PIPCMIF 29 #define TMPV770X_RESET_PICKMON 30 #define TMPV770X_RESET_SBUSCLK 31 -#define TMPV770X_NR_RESET 32 +#define TMPV770X_RESET_VIIFBS0 32 +#define TMPV770X_RESET_VIIFBS0_APB 33 +#define TMPV770X_RESET_VIIFBS0_L2ISP 34 +#define TMPV770X_RESET_VIIFBS0_L1ISP 35 +#define TMPV770X_RESET_VIIFBS1 36 +#define TMPV770X_RESET_VIIFBS1_APB 37 +#define TMPV770X_RESET_VIIFBS1_L2ISP 38 +#define TMPV770X_RESET_VIIFBS1_L1ISP 39 +#define TMPV770X_NR_RESET 40 #endif /*_DT_BINDINGS_CLOCK_TOSHIBA_TMPV770X_H_ */ diff --git a/include/dt-bindings/reset/toshiba,tmpv770x.h b/include/dt-bindings/reset/toshiba,tmpv770x.h index c1007acb19..d711006d6b 100644 --- a/include/dt-bindings/reset/toshiba,tmpv770x.h +++ b/include/dt-bindings/reset/toshiba,tmpv770x.h @@ -36,6 +36,14 @@ #define TMPV770X_RESET_PIPCMIF 29 #define TMPV770X_RESET_PICKMON 30 #define TMPV770X_RESET_SBUSCLK 31 -#define TMPV770X_NR_RESET 32 +#define TMPV770X_RESET_VIIFBS0 32 +#define TMPV770X_RESET_VIIFBS0_APB 33 +#define TMPV770X_RESET_VIIFBS0_L2ISP 34 +#define TMPV770X_RESET_VIIFBS0_L1ISP 35 +#define TMPV770X_RESET_VIIFBS1 36 +#define TMPV770X_RESET_VIIFBS1_APB 37 +#define TMPV770X_RESET_VIIFBS1_L2ISP 38 +#define TMPV770X_RESET_VIIFBS1_L1ISP 39 +#define TMPV770X_NR_RESET 40 #endif /*_DT_BINDINGS_RESET_TOSHIBA_TMPV770X_H_ */ -- 2.43.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH 1/2] dt-bindings: clock: Update identifiers for VIIF on Toshiba Visconti TMPV770x SoC 2025-10-16 1:33 ` [PATCH 1/2] dt-bindings: clock: Update identifiers " Yuji Ishikawa @ 2025-10-16 6:41 ` Krzysztof Kozlowski 2025-10-20 6:19 ` yuji2.ishikawa 0 siblings, 1 reply; 5+ messages in thread From: Krzysztof Kozlowski @ 2025-10-16 6:41 UTC (permalink / raw) To: Yuji Ishikawa, Michael Turquette, Stephen Boyd, Nobuhiro Iwamatsu, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel Cc: linux-clk, linux-arm-kernel, linux-kernel, devicetree On 16/10/2025 03:33, Yuji Ishikawa wrote: > Update identifiers for the clocks and the resets of Video Input Interface > in order to reflect the actual architecture of TMPV770x SoC. > > Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> > --- > include/dt-bindings/clock/toshiba,tmpv770x.h | 33 +++++++++++++------- > include/dt-bindings/reset/toshiba,tmpv770x.h | 10 +++++- > 2 files changed, 31 insertions(+), 12 deletions(-) > > diff --git a/include/dt-bindings/clock/toshiba,tmpv770x.h b/include/dt-bindings/clock/toshiba,tmpv770x.h > index 5fce713001..2dbd5885c0 100644 > --- a/include/dt-bindings/clock/toshiba,tmpv770x.h > +++ b/include/dt-bindings/clock/toshiba,tmpv770x.h > @@ -94,10 +94,10 @@ > #define TMPV770X_CLK_DSP2_PBCLK 77 > #define TMPV770X_CLK_DSP3_PBCLK 78 > #define TMPV770X_CLK_DSVIIF0_APBCLK 79 > -#define TMPV770X_CLK_VIIF0_APBCLK 80 > -#define TMPV770X_CLK_VIIF0_CFGCLK 81 > -#define TMPV770X_CLK_VIIF1_APBCLK 82 > -#define TMPV770X_CLK_VIIF1_CFGCLK 83 > +#define TMPV770X_CLK_VIIFBS0_APB 80 Nope, that's ABI break. These values do not reflect actual architecture, that's some non-sense. These are abstract numbers. NAK Best regards, Krzysztof ^ permalink raw reply [flat|nested] 5+ messages in thread
* RE: [PATCH 1/2] dt-bindings: clock: Update identifiers for VIIF on Toshiba Visconti TMPV770x SoC 2025-10-16 6:41 ` Krzysztof Kozlowski @ 2025-10-20 6:19 ` yuji2.ishikawa 0 siblings, 0 replies; 5+ messages in thread From: yuji2.ishikawa @ 2025-10-20 6:19 UTC (permalink / raw) To: krzk, mturquette, sboyd, nobuhiro.iwamatsu.x90, robh, krzk+dt, conor+dt, p.zabel Cc: linux-clk, linux-arm-kernel, linux-kernel, devicetree Hello Krzysztof Thank you for review comments. > -----Original Message----- > From: Krzysztof Kozlowski <krzk@kernel.org> > Sent: Thursday, October 16, 2025 3:41 PM > To: ishikawa yuji(石川 悠司 □ＡＩＤＣ○ＥＡ開) > <yuji2.ishikawa@toshiba.co.jp>; Michael Turquette > <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; iwamatsu > nobuhiro(岩松 信洋 □ＤＩＴＣ○ＣＰＴ) > <nobuhiro.iwamatsu.x90@mail.toshiba>; Rob Herring <robh@kernel.org>; > Krzysztof Kozlowski <krzk+dt@kernel.org>; Conor Dooley > <conor+dt@kernel.org>; Philipp Zabel <p.zabel@pengutronix.de> > Cc: linux-clk@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; devicetree@vger.kernel.org > Subject: Re: [PATCH 1/2] dt-bindings: clock: Update identifiers for VIIF on > Toshiba Visconti TMPV770x SoC > > On 16/10/2025 03:33, Yuji Ishikawa wrote: > > Update identifiers for the clocks and the resets of Video Input > > Interface in order to reflect the actual architecture of TMPV770x SoC. > > > > Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> > > --- > > include/dt-bindings/clock/toshiba,tmpv770x.h | 33 > > +++++++++++++------- include/dt-bindings/reset/toshiba,tmpv770x.h > | > > 10 +++++- > > 2 files changed, 31 insertions(+), 12 deletions(-) > > > > diff --git a/include/dt-bindings/clock/toshiba,tmpv770x.h > > b/include/dt-bindings/clock/toshiba,tmpv770x.h > > index 5fce713001..2dbd5885c0 100644 > > --- a/include/dt-bindings/clock/toshiba,tmpv770x.h > > +++ b/include/dt-bindings/clock/toshiba,tmpv770x.h > > @@ -94,10 +94,10 @@ > > #define TMPV770X_CLK_DSP2_PBCLK 77 > > #define TMPV770X_CLK_DSP3_PBCLK 78 > > #define TMPV770X_CLK_DSVIIF0_APBCLK 79 > > -#define TMPV770X_CLK_VIIF0_APBCLK 80 > > -#define TMPV770X_CLK_VIIF0_CFGCLK 81 > > -#define TMPV770X_CLK_VIIF1_APBCLK 82 > > -#define TMPV770X_CLK_VIIF1_CFGCLK 83 > > +#define TMPV770X_CLK_VIIFBS0_APB 80 > > Nope, that's ABI break. These values do not reflect actual architecture, that's > some non-sense. These are abstract numbers. > > NAK > > > > Best regards, > Krzysztof I'll rewrite the patch not to break ABI. Existing constant names and values should not be changed. Regards, Yuji Ishikawa ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 2/2] clk: visconti: Add definition of VIIF on Toshiba Visconti TMPV770x SoC 2025-10-16 1:33 [PATCH 0/2] clk: visconti: Add support for VIIF on Toshiba Visconti TMPV770x SoC Yuji Ishikawa 2025-10-16 1:33 ` [PATCH 1/2] dt-bindings: clock: Update identifiers " Yuji Ishikawa @ 2025-10-16 1:33 ` Yuji Ishikawa 1 sibling, 0 replies; 5+ messages in thread From: Yuji Ishikawa @ 2025-10-16 1:33 UTC (permalink / raw) To: Michael Turquette, Stephen Boyd, Nobuhiro Iwamatsu, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Philipp Zabel, Yuji Ishikawa Cc: linux-clk, linux-arm-kernel, linux-kernel, devicetree Add the control sequence of register bits to handle the clocks and the resets of Video Input Interface. Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> --- drivers/clk/visconti/clkc-tmpv770x.c | 71 ++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/drivers/clk/visconti/clkc-tmpv770x.c b/drivers/clk/visconti/clkc-tmpv770x.c index 6c753b2cb5..26cdfa565e 100644 --- a/drivers/clk/visconti/clkc-tmpv770x.c +++ b/drivers/clk/visconti/clkc-tmpv770x.c @@ -28,6 +28,10 @@ static const struct clk_parent_data pietherplls_parent_data[] = { { .fw_name = "pietherpll", .name = "pietherpll", }, }; +static const struct clk_parent_data pidnnplls_parent_data[] = { + { .fw_name = "pidnnpll", .name = "pidnnpll", }, +}; + static const struct visconti_fixed_clk fixed_clk_tables[] = { /* PLL1 */ /* PICMPT0/1, PITSC, PIUWDT, PISWDT, PISBUS, PIPMU, PIGPMU, PITMU */ @@ -64,6 +68,41 @@ static const struct visconti_clk_gate_table pietherpll_clk_gate_tables[] = { TMPV770X_RESET_PIETHER_125M, }, }; +static const struct visconti_clk_gate_table pidnnpll_clk_gate_tables[] = { + { TMPV770X_CLK_VIIFBS0_PROC, "viif0bsproc", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 1, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIF0_PROC, "viif0proc", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 18, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIF0_L1ISP, "viif0l1isp", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 17, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIF0_L2ISP, "viif0l2isp", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 16, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIFBS1_PROC, "viif1bsproc", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 5, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIF1_PROC, "viif1proc", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 22, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIF1_L1ISP, "viif1l1isp", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 21, 1, + NO_RESET, }, + { TMPV770X_CLK_VIIF1_L2ISP, "viif1l2isp", + pidnnplls_parent_data, ARRAY_SIZE(pidnnplls_parent_data), + 0, 0x58, 0x158, 20, 1, + NO_RESET, }, +}; + static const struct visconti_clk_gate_table clk_gate_tables[] = { { TMPV770X_CLK_HOX, "hox", clks_parent_data, ARRAY_SIZE(clks_parent_data), @@ -185,6 +224,22 @@ static const struct visconti_clk_gate_table clk_gate_tables[] = { clks_parent_data, ARRAY_SIZE(clks_parent_data), 0, 0x14, 0x114, 0, 4, TMPV770X_RESET_SBUSCLK, }, + { TMPV770X_CLK_VIIFBS0_CFG, "csi2rx0cfg", + clks_parent_data, ARRAY_SIZE(clks_parent_data), + 0, 0x58, 0x158, 0, 24, + NO_RESET, }, + { TMPV770X_CLK_VIIFBS0_APB, "csi2rx0apb", + clks_parent_data, ARRAY_SIZE(clks_parent_data), + 0, 0x58, 0x158, 2, 4, + NO_RESET, }, + { TMPV770X_CLK_VIIFBS1_CFG, "csi2rx1cfg", + clks_parent_data, ARRAY_SIZE(clks_parent_data), + 0, 0x58, 0x158, 4, 24, + NO_RESET, }, + { TMPV770X_CLK_VIIFBS1_APB, "csi2rx1apb", + clks_parent_data, ARRAY_SIZE(clks_parent_data), + 0, 0x58, 0x158, 6, 4, + NO_RESET, }, }; static const struct visconti_reset_data clk_reset_data[] = { @@ -220,6 +275,14 @@ static const struct visconti_reset_data clk_reset_data[] = { [TMPV770X_RESET_PIPCMIF] = { 0x464, 0x564, 0, }, [TMPV770X_RESET_PICKMON] = { 0x410, 0x510, 8, }, [TMPV770X_RESET_SBUSCLK] = { 0x414, 0x514, 0, }, + [TMPV770X_RESET_VIIFBS0] = { 0x458, 0x558, 0, }, + [TMPV770X_RESET_VIIFBS0_APB] = { 0x458, 0x558, 1, }, + [TMPV770X_RESET_VIIFBS0_L2ISP] = { 0x458, 0x558, 16, }, + [TMPV770X_RESET_VIIFBS0_L1ISP] = { 0x458, 0x558, 17, }, + [TMPV770X_RESET_VIIFBS1] = { 0x458, 0x558, 4, }, + [TMPV770X_RESET_VIIFBS1_APB] = { 0x458, 0x558, 5, }, + [TMPV770X_RESET_VIIFBS1_L2ISP] = { 0x458, 0x558, 20, }, + [TMPV770X_RESET_VIIFBS1_L1ISP] = { 0x458, 0x558, 21, }, }; static int visconti_clk_probe(struct platform_device *pdev) @@ -272,6 +335,14 @@ static int visconti_clk_probe(struct platform_device *pdev) return ret; } + ret = visconti_clk_register_gates(ctx, pidnnpll_clk_gate_tables, + ARRAY_SIZE(pidnnpll_clk_gate_tables), + clk_reset_data, &tmpv770x_clk_lock); + if (ret) { + dev_err(dev, "Failed to register pidnnpll clock gate: %d\n", ret); + return ret; + } + return of_clk_add_hw_provider(np, of_clk_hw_onecell_get, &ctx->clk_data); } -- 2.43.0 ^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-10-20 6:55 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2025-10-16 1:33 [PATCH 0/2] clk: visconti: Add support for VIIF on Toshiba Visconti TMPV770x SoC Yuji Ishikawa 2025-10-16 1:33 ` [PATCH 1/2] dt-bindings: clock: Update identifiers " Yuji Ishikawa 2025-10-16 6:41 ` Krzysztof Kozlowski 2025-10-20 6:19 ` yuji2.ishikawa 2025-10-16 1:33 ` [PATCH 2/2] clk: visconti: Add definition of " Yuji Ishikawa
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