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Wed, 21 Feb 2024 10:36:37 +0000 (GMT) Received: from nasanex01a.na.qualcomm.com (nasanex01a.na.qualcomm.com [10.52.223.231]) by NASANPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 41LAaaaD004597 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 21 Feb 2024 10:36:36 GMT Received: from [10.216.62.93] (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 21 Feb 2024 02:36:31 -0800 Message-ID: <04d68be4-e053-4fea-d50a-217d423bd0e0@quicinc.com> Date: Wed, 21 Feb 2024 16:06:28 +0530 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:102.0) Gecko/20100101 Thunderbird/102.9.1 Subject: Re: [PATCH 3/5] spi: spi-qpic: Add qpic spi nand driver support Content-Language: en-US To: Mark Brown CC: , , , , , , , , , , , , , , , References: <20240215134856.1313239-1-quic_mdalam@quicinc.com> <20240215134856.1313239-4-quic_mdalam@quicinc.com> <21dde665-54b4-48e4-b963-1008ac890df3@sirena.org.uk> <4a0e51cf-d29a-5843-9c61-1d31a9721a3d@quicinc.com> <8422fb6a-edd4-4911-89b7-2974c197981b@sirena.org.uk> From: Md Sadre Alam In-Reply-To: <8422fb6a-edd4-4911-89b7-2974c197981b@sirena.org.uk> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: b-gdpO-FePoSmpYlSk2OJV-uswyjPuRH X-Proofpoint-ORIG-GUID: b-gdpO-FePoSmpYlSk2OJV-uswyjPuRH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-02-20_06,2024-02-20_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=731 spamscore=0 adultscore=0 impostorscore=0 suspectscore=0 clxscore=1015 priorityscore=1501 lowpriorityscore=0 bulkscore=0 malwarescore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2402120000 definitions=main-2402210081 On 2/20/2024 9:34 PM, Mark Brown wrote: > On Tue, Feb 20, 2024 at 05:24:43PM +0530, Md Sadre Alam wrote: >> On 2/15/2024 7:44 PM, Mark Brown wrote: >>> On Thu, Feb 15, 2024 at 07:18:54PM +0530, Md Sadre Alam wrote: > >>>> + if (op->cmd.opcode == SPINAND_READID) { >>>> + snandc->buf_count = 4; >>>> + read_reg_dma(snandc, NAND_READ_ID, 1, NAND_BAM_NEXT_SGL); >>>> + >>>> + ret = submit_descs(snandc); >>>> + if (ret) >>>> + dev_err(snandc->dev, "failure in submitting descriptor for readid\n"); >>>> + >>>> + nandc_read_buffer_sync(snandc, true); >>>> + memcpy(op->data.buf.in, snandc->reg_read_buf, snandc->buf_count); > >>> These memcpy()s don't seem great, why aren't we just reading directly >>> into the output buffer? > >> This reg_read_buf is being used in common API so that it will be used by both >> serial nand as well raw nand, so I can't directly use the output buffer since >> internally CW mechanism I have to maintain in common API. > > We have control over all the source code in the kernel so if there's > problems with the internal interfaces we can improve them. Ok , will try to maintain CW mechanism uniform and remove from common API and move to corresponding driver. Will try to fix in next patch.