Re: [PATCH v4 0/3] Add Qualcomm i3c controller driver support

[Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>]

On 4/13/25 9:28 AM, Mukesh Kumar Savaliya wrote:
> 
> 
> On 4/12/2025 4:50 AM, Konrad Dybcio wrote:
>> On 4/11/25 1:35 PM, Mukesh Kumar Savaliya wrote:
>>> This patchset adds i3c controller support for the qualcomm's QUPV3 based
>>> Serial engine (SE) hardware controller.
>>>
>>> The I3C SE(Serial Engine) controller implements I3C master functionality
>>> as defined in the MIPI Specifications for I3C, Version 1.0.
>>>
>>> This patchset was tested on Kailua SM8550 MTP device and data transfer
>>> has been tested in I3C SDR mode.
>>>
>>> Features tested and supported :
>>>    Standard CCC commands.
>>>    I3C SDR mode private transfers in PIO mode.
>>>    I2C transfers in PIO mode.
>>>
>>> Signed-off-by: Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>
>>> ----
>>> Link to V3: https://lore.kernel.org/lkml/20250403134644.3935983-1-quic_msavaliy@quicinc.com/T/
>>> v3->v4:
>>>   - Dropped "clock-names" property from dt-bindings as suggested by krzysztof.
>>>   - Makefile: Correct order sequence for i3c-qcom-geni.c.
>>>   - Indentation corrected around print statement.
>>>   - geni_i3c_probe() : Exit with return 0 instead of ret for success.
>>>   - Added sparse annotations around i3c_geni_runtime_get_mutex_lock()/_unlock().
>>
>> So this is the third time I got this revision in my inbox, previous were
>> <20250410084813.3594436-1-quic_msavaliy@quicinc.com> 10.04
>> <20250331164648.2321899-1-quic_msavaliy@quicinc.com> 31.03
>>
>> b4 should be automatically upticking the revision counter, please don't mess
>> with it manually
> Sorry Konrad, i could not understand what's the problem or what you are trying to say.
> 
> Do you suspect something (Which i didnt get) is seen as manually changed ?

Yes, normally each 'b4 send' upticks the revision counter, but here we got
a couple submissions all with v4

Konrad