From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from vps0.lunn.ch (vps0.lunn.ch [156.67.10.101]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2F0E50263; Fri, 24 May 2024 21:54:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.67.10.101 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716587700; cv=none; b=bnkh4hd7vO6OBFpUJO6Uvg8NKKFoy1asxawnaAO2DrlweXMNkELwzOWgMtWZdWChCCcsXBcDt53u6D8PFmmqiXbtoZj+aTM1v3QpY9v2C/gER8eqszSV/do89J/FbdIytgSLjOj02p2dKoImMFcVRLWUbKtZe2VgyMVemzVenKE= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716587700; c=relaxed/simple; bh=uBiB2OxIx+QLLDkp21EN3GZ/wnImGVQhH+E8hIwA0Ks=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=k3vgXzkgGQfnfPIBaZf9BdRId90MJj4s6lncbIVawmsWaH385g7O01Y23r5SkOcFkKRvw2EgGoigWomazY0cV7gWTXErB0pBtI7AnJaYW3Pt15Mmf9Dol3241oqITGXuZs7w+xjw8PhY3eSIf6NXcUU4vrgnEXrEGJHbZTgTfQI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch; spf=pass smtp.mailfrom=lunn.ch; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b=Fe29KHR2; arc=none smtp.client-ip=156.67.10.101 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=lunn.ch Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lunn.ch Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lunn.ch header.i=@lunn.ch header.b="Fe29KHR2" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lunn.ch; s=20171124; h=In-Reply-To:Content-Disposition:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:From:Sender:Reply-To:Subject: Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding: Content-ID:Content-Description:Content-Disposition:In-Reply-To:References; bh=VdMjgCwAEWh/I3uCmfOdWHsSn/IkPKaLvDRwty7frmQ=; b=Fe29KHR2AGqq+pANkZ4ABkXHPg vOVNjsmL92X6gbMm8PiuwC1ibX8LedLrH1wO+waAmbMghdMoi2JammC62Aue9lfFMaco5AiRFRKDZ onujCaw8kRqnmUxay7NoFnWFu+0wf13IqL6dIX7gED3u+znXoXZeZOxw3KjcU4sjfJPw=; Received: from andrew by vps0.lunn.ch with local (Exim 4.94.2) (envelope-from ) id 1sAcs8-00FypH-S3; Fri, 24 May 2024 23:54:44 +0200 Date: Fri, 24 May 2024 23:54:44 +0200 From: Andrew Lunn To: Piergiorgio Beruto Cc: Selvamani Rajagopal , "Parthiban.Veerasooran@microchip.com" , "davem@davemloft.net" , "edumazet@google.com" , "kuba@kernel.org" , "pabeni@redhat.com" , "horms@kernel.org" , "saeedm@nvidia.com" , "anthony.l.nguyen@intel.com" , "netdev@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "corbet@lwn.net" , "linux-doc@vger.kernel.org" , "robh+dt@kernel.org" , "krzysztof.kozlowski+dt@linaro.org" , "conor+dt@kernel.org" , "devicetree@vger.kernel.org" , "Horatiu.Vultur@microchip.com" , "ruanjinjie@huawei.com" , "Steen.Hegelund@microchip.com" , "vladimir.oltean@nxp.com" , "UNGLinuxDriver@microchip.com" , "Thorsten.Kummermehr@microchip.com" , "Nicolas.Ferre@microchip.com" , "benjamin.bigler@bernformulastudent.ch" Subject: Re: [PATCH net-next v4 00/12] Add support for OPEN Alliance 10BASE-T1x MACPHY Serial Interface Message-ID: <0581b64a-dd7a-43d7-83f7-657ae93cefe5@lunn.ch> References: <5f73edc0-1a25-4d03-be21-5b1aa9e933b2@lunn.ch> <32160a96-c031-4e5a-bf32-fd5d4dee727e@lunn.ch> <2d9f523b-99b7-485d-a20a-80d071226ac9@microchip.com> <6ba7e1c8-5f89-4a0e-931f-3c117ccc7558@lunn.ch> <8b9f8c10-e6bf-47df-ad83-eaf2590d8625@microchip.com> <44cd0dc2-4b37-4e2f-be47-85f4c0e9f69c@lunn.ch> <6e4c8336-2783-45dd-b907-6b31cf0dae6c@lunn.ch> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: > In reality, it is not the PHY having register in MMS12, and not even > the MAC. These are really "chip-specific" registers, unrelated to > networking (e.g., GPIOs, HW diagnostics, etc.). Having a GPIO driver within the MAC driver is O.K. For hardware diagnostics you should be using devlink, which many MAC drivers have. So i don't see a need for the PHY driver to access MMS 12. Anyway, we can do a real review when you post your code. > Although, I think it is a good idea anyway to allow the MACPHY > drivers to hook into / extend the MDIO access functions. If > anything, because of the hacks you mentioned. But also to allow > vendor-specific extensions. But we don't want vendor specific extensions. OS 101, the OS is there to make all hardware look the same. And in general, it is not often that vendors actually come up with anything unique. And if they do, and it is useful, other vendors will copy it. So rather than doing vendor specific extensions, you should be thinking about how to export it in a way which is common across multiple vendors. Andrew