[PATCH] dt-bindings: arm: socfpga: Add Altera SOCFPGA SDRAM EDAS

[PATCH] dt-bindings: arm: socfpga: Add Altera SOCFPGA SDRAM EDAS

[Alessandro Zanni]

Added new yaml file that substitues the old txt file.

Signed-off-by: Alessandro Zanni <alessandro.zanni87@gmail.com>
---
 .../arm/altera/socfpga-sdram-edac.txt         | 15 ------
 .../arm/altera/socfpga-sdram-edac.yaml        | 46 +++++++++++++++++++
 2 files changed, 46 insertions(+), 15 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
 create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
deleted file mode 100644
index f5ad0ff69fae..000000000000
--- a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.txt
+++ /dev/null
@@ -1,15 +0,0 @@
-Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
-The EDAC accesses a range of registers in the SDRAM controller.
-
-Required properties:
-- compatible : should contain "altr,sdram-edac" or "altr,sdram-edac-a10"
-- altr,sdr-syscon : phandle of the sdr module
-- interrupts : Should contain the SDRAM ECC IRQ in the
-	appropriate format for the IRQ controller.
-
-Example:
-	sdramedac {
-		compatible = "altr,sdram-edac";
-		altr,sdr-syscon = <&sdr>;
-		interrupts = <0 39 4>;
-	};
diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
new file mode 100644
index 000000000000..78fbe31e4a2b
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
+
+maintainers:
+  - Dinh Nguyen <dinguyen@kernel.org>
+
+description:
+  The EDAC accesses a range of registers in the SDRAM controller.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - enum:
+              - altr,sdram-edac
+              - altr,sdram-edac-a10
+
+  altr,sdr-syscon:
+    $ref: /schemas/types.yaml#/definitions/phandle
+    description: 
+      Phandle of the sdr module
+
+  interrupts:
+    maxItems: 1
+
+required:
+  - compatible
+  - altr,sdr-syscon
+  - interrupts
+
+additionalProperties: false
+
+examples:
+  - |
+    sdramedac {
+      compatible = "altr,sdram-edac";
+      altr,sdr-syscon = <&sdr>;
+      interrupts = <0 39 4>;
+    };
+
+...
-- 
2.43.0

Re: [PATCH] dt-bindings: arm: socfpga: Add Altera SOCFPGA SDRAM EDAS

[Krzysztof Kozlowski]

On 01/08/2024 01:02, Alessandro Zanni wrote:

Thank you for your patch. There is something to discuss/improve.


> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> new file mode 100644
> index 000000000000..78fbe31e4a2b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml

Filename like compatible, so altr,sdram-edac.yaml

Fix the placement - arm is only for top-level sutff. This goes to
memory-controllers or edac



> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: GPL-2.0
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/altera/socfpga-sdram-edac.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Altera SOCFPGA SDRAM Error Detection & Correction [EDAC]
> +
> +maintainers:
> +  - Dinh Nguyen <dinguyen@kernel.org>
> +
> +description:
> +  The EDAC accesses a range of registers in the SDRAM controller.
> +
> +properties:
> +  compatible:
> +    oneOf:

Drop oneOf

> +      - items:

Drop items, just use enum


> +          - enum:
> +              - altr,sdram-edac
> +              - altr,sdram-edac-a10
> +
> +  altr,sdr-syscon:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description: 
> +      Phandle of the sdr module
> +
> +  interrupts:
> +    maxItems: 1
> +
> +required:
> +  - compatible
> +  - altr,sdr-syscon
> +  - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    sdramedac {

Node names should be generic. See also an explanation and list of
examples (not exhaustive) in DT specification:
https://devicetree-specification.readthedocs.io/en/latest/chapter2-devicetree-basics.html#generic-names-recommendation

e.g. memory-controller


> +      compatible = "altr,sdram-edac";
> +      altr,sdr-syscon = <&sdr>;
> +      interrupts = <0 39 4>;

Use proper defines.

> +    };
> +
> +...

Best regards,
Krzysztof

Re: [PATCH] dt-bindings: arm: socfpga: Add Altera SOCFPGA SDRAM EDAS

[Krzysztof Kozlowski]

On 01/08/2024 10:44, Krzysztof Kozlowski wrote:
> On 01/08/2024 01:02, Alessandro Zanni wrote:
> 
> Thank you for your patch. There is something to discuss/improve.
> 
> 
>> diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
>> new file mode 100644
>> index 000000000000..78fbe31e4a2b
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram-edac.yaml
> 
> Filename like compatible, so altr,sdram-edac.yaml
> 
> Fix the placement - arm is only for top-level sutff. This goes to
> memory-controllers or edac
> 

So this was a v2? Then version your patches correctly and add
appropriate and detailed changelog under ---.

See submitting patches.

Best regards,
Krzysztof