From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Cc: Shiji Yang <yangshiji66@outlook.com>,
arinc.unal@arinc9.com, devicetree@vger.kernel.org,
john@phrozen.org, krzysztof.kozlowski+dt@linaro.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mips@vger.kernel.org, matthias.bgg@gmail.com,
mturquette@baylibre.com, p.zabel@pengutronix.de,
robh+dt@kernel.org, sboyd@kernel.org, tsbogend@alpha.franken.de
Subject: Re: [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs
Date: Sat, 17 Jun 2023 16:43:10 +0200 [thread overview]
Message-ID: <05e3ff33-ad4e-d2fb-dfd5-7b5265881b74@linaro.org> (raw)
In-Reply-To: <CAMhs-H9M_c8+AkqUTpYeS2q7_+wBA-jhhiXj-QVXNUDmuERcOA@mail.gmail.com>
On 17/06/2023 15:31, Sergio Paracuellos wrote:
> Hi Krzysztof,
>
> On Sat, Jun 17, 2023 at 3:07 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@linaro.org> wrote:
>>
>> On 17/06/2023 14:54, Shiji Yang wrote:
>>>> void __init plat_time_init(void)
>>>> {
>>>> + struct of_phandle_args clkspec;
>>>> struct clk *clk;
>>>> + int cpu_clk_idx;
>>>>
>>>> ralink_of_remap();
>>>>
>>>> - ralink_clk_init();
>>>> - clk = clk_get_sys("cpu", NULL);
>>>> + cpu_clk_idx = clk_cpu_index();
>>>> + if (cpu_clk_idx == -1)
>>>> + panic("unable to get CPU clock index");
>>>> +
>>>> + of_clk_init(NULL);
>>>> + clkspec.np = of_find_node_by_name(NULL, "sysc");
>>>
>>> The node name should be "syscon" as the example node name in the
>>> dt-bindings document is "syscon".
>>
>> NAK for both.
>>
>> Node names must not be an ABI, unless you talk about child of some
>> device node. I don't think this is the case here. Look by phandle (for a
>> device context) or by compatible (looks the case here).
>
> We need to get the cpu clock to set the initial cpu clock here. Search
> by 'sysc' is the only shared in all the dtsi files since it is the
> clock provider node. Why is this not correct?
Because device node name can change anytime and your entire Linux driver
gets broken. Node name is not an ABI.
> I don't understand what
> you mean with look by phandle for a device context.
Your device node should contain phandle to the other node.
> The case of
> searching for compatible is a mess since as you can see in the
> bindings there are tons of compatibles to search for, then (this code
> is common to all ralink platforms).
Compatible is one of the ways using ABI.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-06-17 14:43 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-17 5:24 [PATCH v4 0/9] [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 1/9] dt-bindings: clock: add mtmips SoCs system controller Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-17 12:54 ` [PATCH v3 " Shiji Yang
2023-06-17 13:07 ` Krzysztof Kozlowski
2023-06-17 13:31 ` Sergio Paracuellos
2023-06-17 14:43 ` Krzysztof Kozlowski [this message]
2023-06-17 15:37 ` Sergio Paracuellos
2023-06-17 17:20 ` Krzysztof Kozlowski
2023-06-17 19:11 ` Sergio Paracuellos
2023-06-18 5:04 ` Sergio Paracuellos
2023-06-17 13:26 ` Sergio Paracuellos
2023-06-17 14:43 ` Krzysztof Kozlowski
2023-06-17 15:31 ` Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 3/9] mips: ralink: rt288x: remove clock related code Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 4/9] mips: ralink: rt305x: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 5/9] mips: ralink: rt3883: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 6/9] mips: ralink: mt7620: " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 7/9] mips: ralink: remove reset " Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 8/9] mips: ralink: get cpu rate from new driver code Sergio Paracuellos
2023-06-17 14:48 ` Krzysztof Kozlowski
2023-06-17 15:35 ` Sergio Paracuellos
2023-06-17 17:27 ` Krzysztof Kozlowski
2023-06-17 19:01 ` Sergio Paracuellos
2023-06-17 5:24 ` [PATCH v4 9/9] MAINTAINERS: add Mediatek MTMIPS Clock maintainer Sergio Paracuellos
-- strict thread matches above, loose matches on Subject: below --
2023-04-18 9:03 [PATCH v3 0/9] mips: ralink: add complete clock and reset driver for mtmips SoCs Sergio Paracuellos
2023-04-18 9:03 ` [PATCH v3 2/9] clk: ralink: add clock and reset driver for MTMIPS SoCs Sergio Paracuellos
2023-06-16 18:03 ` Stephen Boyd
2023-06-17 4:51 ` yangshiji66
2023-06-17 5:06 ` Sergio Paracuellos
2023-06-17 5:50 ` Shiji Yang
2023-06-17 6:00 ` Sergio Paracuellos
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