From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Pierre Gondois <pierre.gondois@arm.com>, linux-kernel@vger.kernel.org
Cc: Rob.Herring@arm.com, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Andrew Lunn <andrew@lunn.ch>,
Gregory Clement <gregory.clement@bootlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
Vadym Kochan <vadym.kochan@plvision.eu>,
Chris Packham <chris.packham@alliedtelesis.co.nz>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 10/20] arm64: dts: Update cache properties for marvell
Date: Wed, 2 Nov 2022 16:47:34 -0400 [thread overview]
Message-ID: <060ad3b1-8a44-60d0-29d2-bdec6fd939c6@linaro.org> (raw)
In-Reply-To: <20221031092020.532456-1-pierre.gondois@arm.com>
On 31/10/2022 05:20, Pierre Gondois wrote:
> The DeviceTree Specification v0.3 specifies that the cache node
> 'compatible' and 'cache-level' properties are 'required'. Cf.
> s3.8 Multi-level and Shared Cache Nodes
>
> The recently added init_of_cache_level() function checks
> these properties. Add them if missing.
>
> Signed-off-by: Pierre Gondois <pierre.gondois@arm.com>
Your threading is broken.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-11-02 20:47 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-31 9:20 [PATCH 10/20] arm64: dts: Update cache properties for marvell Pierre Gondois
2022-10-31 20:12 ` Chris Packham
2022-11-02 20:47 ` Krzysztof Kozlowski [this message]
2022-11-28 0:09 ` Gregory CLEMENT
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