devicetree.vger.kernel.org archive mirror
 help / color / mirror / Atom feed
From: Philipp Zabel <p.zabel@pengutronix.de>
To: Conor Dooley <conor@kernel.org>, linux-kernel@vger.kernel.org
Cc: Conor Dooley <conor.dooley@microchip.com>,
	Daire McNamara <daire.mcnamara@microchip.com>,
	pierre-henry.moussay@microchip.com,
	 valentina.fernandezalanis@microchip.com,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Jassi Brar <jassisinghbrar@gmail.com>, Lee Jones <lee@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>,
	Martin Blumenstingl <martin.blumenstingl@googlemail.com>,
	linux-riscv@lists.infradead.org,  linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org,  linux-amlogic@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v1 06/11] reset: mpfs: add non-auxiliary bus probing
Date: Wed, 02 Oct 2024 13:59:18 +0200	[thread overview]
Message-ID: <07764ea71869cc1c1f95200bcb4e0888fd705dec.camel@pengutronix.de> (raw)
In-Reply-To: <20241002-breeze-anywhere-4114da636ec6@spud>

On Mi, 2024-10-02 at 11:48 +0100, Conor Dooley wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
> 
> While the auxiliary bus was a nice bandaid, and meant that re-writing
> the representation of the clock regions in devicetree was not required,
> it has run its course. The "mss_top_sysreg" region that contains the
> clock and reset regions, also contains pinctrl and an interrupt
> controller, so the time has come rewrite the devicetree and probe the
> reset controller from an mfd devicetree node, rather than implement
> those drivers using the auxiliary bus. Wanting to avoid propagating this
> naive/incorrect description of the hardware to the new pic64gx SoC is a
> major motivating factor here.
> 
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
>  drivers/reset/reset-mpfs.c | 83 ++++++++++++++++++++++++++++++++------
>  1 file changed, 71 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/reset/reset-mpfs.c b/drivers/reset/reset-mpfs.c
> index 710f9c1676f93..ac72e0fc405ed 100644
> --- a/drivers/reset/reset-mpfs.c
> +++ b/drivers/reset/reset-mpfs.c
> @@ -9,10 +9,12 @@
>  #include <linux/auxiliary_bus.h>
>  #include <linux/delay.h>
>  #include <linux/io.h>
> +#include <linux/mfd/syscon.h>
>  #include <linux/module.h>
>  #include <linux/of.h>
>  #include <linux/platform_device.h>
>  #include <linux/slab.h>
> +#include <linux/regmap.h>
>  #include <linux/reset-controller.h>
>  #include <dt-bindings/clock/microchip,mpfs-clock.h>
>  #include <soc/microchip/mpfs.h>
> @@ -27,14 +29,37 @@
>  #define MPFS_SLEEP_MIN_US	100
>  #define MPFS_SLEEP_MAX_US	200
>  
> +#define REG_SUBBLK_RESET_CR	0x88u
> +
>  /* block concurrent access to the soft reset register */
>  static DEFINE_SPINLOCK(mpfs_reset_lock);
>  
>  struct mpfs_reset {
>  	void __iomem *base;
> +	struct regmap *regmap;
>  	struct reset_controller_dev rcdev;
>  };
>  
> +static inline u32 mpfs_reset_read(struct mpfs_reset *rst)
> +{
> +	u32 ret;
> +
> +	if (rst->regmap)
> +		regmap_read(rst->regmap, REG_SUBBLK_RESET_CR, &ret);
> +	else
> +		ret = readl(rst->base);
> +
> +	return ret;
> +}
> +
> +static inline void mpfs_reset_write(struct mpfs_reset *rst, u32 val)
> +{
> +	if (rst->regmap)
> +		regmap_write(rst->regmap, REG_SUBBLK_RESET_CR, val);
> +	else
> +		writel(val, rst->base);
> +}
> +
>  static inline struct mpfs_reset *to_mpfs_reset(struct reset_controller_dev *rcdev)
>  {
>  	return container_of(rcdev, struct mpfs_reset, rcdev);
> @@ -51,9 +76,9 @@ static int mpfs_assert(struct reset_controller_dev *rcdev, unsigned long id)
>  
>  	spin_lock_irqsave(&mpfs_reset_lock, flags);
>  
> -	reg = readl(rst->base);
> +	reg = mpfs_reset_read(rst);
>  	reg |= BIT(id);
> -	writel(reg, rst->base);
> +	mpfs_reset_write(rst, reg);

This should use regmap_update_bits() in the regmap case, same in
mpfs_deassert().

regards
Philipp

  reply	other threads:[~2024-10-02 11:59 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-02 10:47 [PATCH v1 00/11] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
2024-10-02 10:47 ` [PATCH v1 01/11] dt-bindings: mailbox: mpfs: fix reg properties Conor Dooley
2024-10-02 23:13   ` Rob Herring (Arm)
2024-10-02 10:48 ` [PATCH v1 02/11] mailbox: mpfs: support new, syscon based, devicetree configuration Conor Dooley
2024-10-02 10:48 ` [PATCH v1 03/11] dt-bindings: mfd: syscon document the non simple-mfd syscon on PolarFire SoC Conor Dooley
2024-10-02 23:28   ` Rob Herring (Arm)
2024-10-09 16:12   ` (subset) " Lee Jones
2024-10-02 10:48 ` [PATCH v1 04/11] dt-bindings: soc: microchip: document the two simple-mfd syscons " Conor Dooley
2024-10-02 23:28   ` Rob Herring
2024-10-02 10:48 ` [PATCH v1 05/11] soc: microchip: add mfd drivers for two syscon regions " Conor Dooley
2024-10-02 10:48 ` [PATCH v1 06/11] reset: mpfs: add non-auxiliary bus probing Conor Dooley
2024-10-02 11:59   ` Philipp Zabel [this message]
2024-10-02 10:48 ` [PATCH v1 07/11] dt-bindings: clk: microchip: mpfs: remove first reg region Conor Dooley
2024-10-02 23:36   ` Rob Herring (Arm)
2024-10-02 10:48 ` [PATCH v1 08/11] clk: move meson clk-regmap implementation to common code Conor Dooley
2024-10-02 11:20   ` Neil Armstrong
2024-10-02 13:21     ` Jerome Brunet
2024-10-03 11:33       ` Conor Dooley
2024-11-06 12:56         ` Conor Dooley
2024-11-15  1:29           ` Stephen Boyd
2024-11-28 10:36             ` Conor Dooley
2024-12-03 22:50               ` Stephen Boyd
2024-12-06 13:56                 ` Conor Dooley
2025-01-21 17:38                   ` Conor Dooley
2025-02-20 15:29                     ` Conor Dooley
2024-10-02 10:48 ` [PATCH v1 09/11] clk: microchip: mpfs: use regmap clock types Conor Dooley
2024-10-02 10:48 ` [PATCH v1 10/11] riscv: dts: microchip: fix mailbox description Conor Dooley
2024-10-14 15:41   ` Conor Dooley
2024-10-02 10:48 ` [PATCH v1 11/11] riscv: dts: microchip: convert clock and reset to use syscon Conor Dooley

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=07764ea71869cc1c1f95200bcb4e0888fd705dec.camel@pengutronix.de \
    --to=p.zabel@pengutronix.de \
    --cc=aou@eecs.berkeley.edu \
    --cc=conor.dooley@microchip.com \
    --cc=conor@kernel.org \
    --cc=daire.mcnamara@microchip.com \
    --cc=devicetree@vger.kernel.org \
    --cc=jassisinghbrar@gmail.com \
    --cc=jbrunet@baylibre.com \
    --cc=khilman@baylibre.com \
    --cc=krzk+dt@kernel.org \
    --cc=lee@kernel.org \
    --cc=linux-amlogic@lists.infradead.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=martin.blumenstingl@googlemail.com \
    --cc=mturquette@baylibre.com \
    --cc=neil.armstrong@linaro.org \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=pierre-henry.moussay@microchip.com \
    --cc=robh@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=valentina.fernandezalanis@microchip.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).