From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: David Heidelberg <david@ixit.cz>, Joerg Roedel <joro@8bytes.org>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>
Cc: iommu@lists.linux.dev, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org
Subject: Re: [PATCH v4] dt-bindings: iommu: Convert msm,iommu-v0 to yaml
Date: Sat, 16 Dec 2023 01:00:17 +0100 [thread overview]
Message-ID: <07e24570-4041-430f-b51e-6ac535218a30@linaro.org> (raw)
In-Reply-To: <20231215233034.95789-1-david@ixit.cz>
On 16.12.2023 00:30, David Heidelberg wrote:
> Convert Qualcomm IOMMU v0 implementation to yaml format.
>
> Signed-off-by: David Heidelberg <david@ixit.cz>
> ---
[...]
> +description: >
Not sure if > is necessary
> + The MSM IOMMU is an implementation compatible with the ARM VMSA short
> + descriptor page tables. It provides address translation for bus masters
> + outside of the CPU, each connected to the IOMMU through a port called micro-TLB.
> +
> +properties:
> + compatible:
> + const: qcom,apq8064-iommu
> +
> + clocks:
> + items:
> + - description: interface clock for register accesses
> + - description: functional clock for bus accesses
> +
> + clock-names:
> + items:
> + - const: smmu_pclk
> + - const: iommu_clk
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + description: Specifiers for the MMU fault interrupts.
> + minItems: 1
> + items:
> + - description: non-secure mode interrupt
> + - description: secure mode interrupt (for instances which supports it)
> +
> + "#iommu-cells":
> + const: 1
> + description: |
| may not be necessary
> + The first cell is a phandle to the IOMMU and
> + the second cell is the stream id.
Weird wrapping
> + A single master device can be connected to more than one iommu
> + and multiple contexts in each of the iommu.
> + So multiple entries are required to list all the iommus and
> + the stream ids that the master is connected to.
> +
> + qcom,ncb:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description: The total number of context banks in the IOMMU.
> +
> +required:
> + - clocks
> + - clock-names
> + - reg
> + - interrupts
> + - qcom,ncb
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
> +
> + iommu@7500000 {
> + compatible = "qcom,apq8064-iommu";
> + #iommu-cells = <1>;
> + clock-names =
> + "smmu_pclk",
> + "iommu_clk";
> + clocks =
> + <&clk SMMU_AHB_CLK>,
> + <&clk MDP_AXI_CLK>;
> + reg = <0x07500000 0x100000>;
> + interrupts =
> + <0 63 0>,
> + <0 64 0>;
> + qcom,ncb = <2>;
2012 codestyle :D
Please update to:
iommu@7500000 {
compatible = "qcom,apq8064-iommu";
reg = <0x07500000 0x100000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_NONE>, //preferably fix this TYPE_NONE
<GIC_SPI 64 IRQ_TYPE_NONE>;
clocks = <&clk SMMU_AHB_CLK>,
<&clk MDP_AXI_CLK>;
clock-names = "smmu_pclk",
"iommu_clk";
#iommu-cells = <1>;
qcom,ncb = <2>;
};
+ Krzysztof would likely suggest to reorder the definitions and occurences
in required: to match this /\
Thanks for taking care of this old junk!
Konrad
prev parent reply other threads:[~2023-12-16 0:00 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-15 23:30 [PATCH v4] dt-bindings: iommu: Convert msm,iommu-v0 to yaml David Heidelberg
2023-12-16 0:00 ` Konrad Dybcio [this message]
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