* [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver [not found] <CGME20241226031145epcas2p4fa41b44749a7f675364437856d01a4c6@epcas2p4.samsung.com> @ 2024-12-26 3:11 ` Sowon Na 2024-12-26 3:11 ` [PATCH v4 1/3] dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings Sowon Na ` (4 more replies) 0 siblings, 5 replies; 9+ messages in thread From: Sowon Na @ 2024-12-26 3:11 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na This patchset introduces ExynosAuto v920 SoC ufs phy driver as Generic PHY driver framework. Changes from v3: - Use lower case for all addresses - Add empty line between macro and function Changes from v2: - simplify function name from samsung_exynosautov920_ufs_phy_wait_cdr_lock to exynosautov920_ufs_phy_wait_cdr_lock - return immediately after getting the CDR lock - add comment for wait CDR lock Changes from v1: - use exynosautov920 instead of exynosauto to specify - remove obvious comment - change soc name as ExynosAutov920 to keep consistent - use macros instead of magic numbers - specify function name - add error handling for CDR lock failure Sowon Na (3): dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings phy: samsung-ufs: support ExynosAutov920 ufs phy driver arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC .../bindings/phy/samsung,ufs-phy.yaml | 1 + .../arm64/boot/dts/exynos/exynosautov920.dtsi | 11 ++ drivers/phy/samsung/Makefile | 1 + drivers/phy/samsung/phy-exynosautov920-ufs.c | 168 ++++++++++++++++++ drivers/phy/samsung/phy-samsung-ufs.c | 9 +- drivers/phy/samsung/phy-samsung-ufs.h | 4 + 6 files changed, 191 insertions(+), 3 deletions(-) create mode 100644 drivers/phy/samsung/phy-exynosautov920-ufs.c -- 2.45.2 ^ permalink raw reply [flat|nested] 9+ messages in thread
* [PATCH v4 1/3] dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings 2024-12-26 3:11 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver Sowon Na @ 2024-12-26 3:11 ` Sowon Na 2024-12-26 3:11 ` [PATCH v4 2/3] phy: samsung-ufs: support ExynosAutov920 ufs phy driver Sowon Na ` (3 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Sowon Na @ 2024-12-26 3:11 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na, Krzysztof Kozlowski Add samsung,exynosautov920-ufs-phy compatible for ExynosAuto v920 SoC. Signed-off-by: Sowon Na <sowon.na@samsung.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> --- Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml index f402e31bf58d..d70ffeb6e824 100644 --- a/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/samsung,ufs-phy.yaml @@ -18,6 +18,7 @@ properties: - google,gs101-ufs-phy - samsung,exynos7-ufs-phy - samsung,exynosautov9-ufs-phy + - samsung,exynosautov920-ufs-phy - tesla,fsd-ufs-phy reg: -- 2.45.2 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 2/3] phy: samsung-ufs: support ExynosAutov920 ufs phy driver 2024-12-26 3:11 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver Sowon Na 2024-12-26 3:11 ` [PATCH v4 1/3] dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings Sowon Na @ 2024-12-26 3:11 ` Sowon Na 2024-12-26 3:11 ` [PATCH v4 3/3] arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC Sowon Na ` (2 subsequent siblings) 4 siblings, 0 replies; 9+ messages in thread From: Sowon Na @ 2024-12-26 3:11 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na Add support for ExynosAutov920 ufs phy driver. Signed-off-by: Sowon Na <sowon.na@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> --- drivers/phy/samsung/Makefile | 1 + drivers/phy/samsung/phy-exynosautov920-ufs.c | 168 +++++++++++++++++++ drivers/phy/samsung/phy-samsung-ufs.c | 9 +- drivers/phy/samsung/phy-samsung-ufs.h | 4 + 4 files changed, 179 insertions(+), 3 deletions(-) create mode 100644 drivers/phy/samsung/phy-exynosautov920-ufs.c diff --git a/drivers/phy/samsung/Makefile b/drivers/phy/samsung/Makefile index fea1f96d0e43..342682638a87 100644 --- a/drivers/phy/samsung/Makefile +++ b/drivers/phy/samsung/Makefile @@ -7,6 +7,7 @@ phy-exynos-ufs-y += phy-gs101-ufs.o phy-exynos-ufs-y += phy-samsung-ufs.o phy-exynos-ufs-y += phy-exynos7-ufs.o phy-exynos-ufs-y += phy-exynosautov9-ufs.o +phy-exynos-ufs-y += phy-exynosautov920-ufs.o phy-exynos-ufs-y += phy-fsd-ufs.o obj-$(CONFIG_PHY_SAMSUNG_USB2) += phy-exynos-usb2.o phy-exynos-usb2-y += phy-samsung-usb2.o diff --git a/drivers/phy/samsung/phy-exynosautov920-ufs.c b/drivers/phy/samsung/phy-exynosautov920-ufs.c new file mode 100644 index 000000000000..21ef79c42f95 --- /dev/null +++ b/drivers/phy/samsung/phy-exynosautov920-ufs.c @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * UFS PHY driver data for Samsung ExynosAuto v920 SoC + * + * Copyright (C) 2024 Samsung Electronics Co., Ltd. + */ + +#include "phy-samsung-ufs.h" + +#define EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CTRL 0x708 +#define EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1 +#define EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0) +#define EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS 0x5e + +#define EXYNOSAUTOV920_CDR_LOCK_OFFSET 0xce4 + +#define PHY_EXYNOSAUTOV920_LANE_OFFSET 0x200 +#define PHY_TRSV_REG_CFG_AUTOV920(o, v, d) \ + PHY_TRSV_REG_CFG_OFFSET(o, v, d, PHY_EXYNOSAUTOV920_LANE_OFFSET) + +/* Calibration for phy initialization */ +static const struct samsung_ufs_phy_cfg exynosautov920_pre_init_cfg[] = { + PHY_COMN_REG_CFG(0x29, 0x22, PWR_MODE_ANY), + PHY_COMN_REG_CFG(0x43, 0x10, PWR_MODE_ANY), + PHY_COMN_REG_CFG(0x3c, 0x14, PWR_MODE_ANY), + PHY_COMN_REG_CFG(0x46, 0x48, PWR_MODE_ANY), + PHY_COMN_REG_CFG(0x04, 0x95, PWR_MODE_ANY), + PHY_COMN_REG_CFG(0x06, 0x30, PWR_MODE_ANY), + + PHY_TRSV_REG_CFG_AUTOV920(0x200, 0x00, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x201, 0x06, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x202, 0x06, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x203, 0x0a, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x204, 0x00, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x205, 0x10, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x207, 0x0c, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2e1, 0xc0, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x22d, 0xf8, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x234, 0x60, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x238, 0x13, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x239, 0x48, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x23a, 0x01, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x23b, 0x29, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x23c, 0x2a, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x23d, 0x01, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x23e, 0x14, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x23f, 0x13, PWR_MODE_ANY), + + PHY_TRSV_REG_CFG_AUTOV920(0x240, 0x4a, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x243, 0x40, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x244, 0x02, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x25d, 0x00, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x25e, 0x3f, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x25f, 0xff, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x26f, 0xf0, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x273, 0x33, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x274, 0x50, PWR_MODE_ANY), + + PHY_TRSV_REG_CFG_AUTOV920(0x284, 0x02, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x285, 0x02, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2a2, 0x04, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x27d, 0x01, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2fa, 0x01, PWR_MODE_ANY), + + PHY_TRSV_REG_CFG_AUTOV920(0x286, 0x03, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x287, 0x03, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x288, 0x03, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x289, 0x03, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2b3, 0x04, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2b6, 0x0b, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2b7, 0x0b, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2b8, 0x0b, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2b9, 0x0b, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2ba, 0x0b, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2bb, 0x06, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2bc, 0x06, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2bd, 0x06, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x2be, 0x06, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x34b, 0x01, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x34c, 0x24, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x34d, 0x23, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x34e, 0x45, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x34f, 0x00, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x350, 0x31, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x351, 0x00, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x352, 0x02, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x353, 0x00, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x354, 0x01, PWR_MODE_ANY), + + PHY_COMN_REG_CFG(0x43, 0x18, PWR_MODE_ANY), + PHY_COMN_REG_CFG(0x43, 0x00, PWR_MODE_ANY), + + END_UFS_PHY_CFG, +}; + +/* Calibration for HS mode series A/B */ +static const struct samsung_ufs_phy_cfg exynosautov920_pre_pwr_hs_cfg[] = { + PHY_TRSV_REG_CFG_AUTOV920(0x369, 0x11, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x246, 0x03, PWR_MODE_ANY), + + END_UFS_PHY_CFG, +}; + +static const struct samsung_ufs_phy_cfg exynosautov920_post_pwr_hs_cfg[] = { + END_UFS_PHY_CFG, +}; + +#define DELAY_IN_US 40 +#define RETRY_CNT 100 +#define EXYNOSAUTOV920_CDR_LOCK_MASK 0x8 + +int exynosautov920_ufs_phy_wait_cdr_lock(struct phy *phy, u8 lane) +{ + struct samsung_ufs_phy *ufs_phy = get_samsung_ufs_phy(phy); + u32 reg, i; + + struct samsung_ufs_phy_cfg cfg[4] = { + PHY_TRSV_REG_CFG_AUTOV920(0x222, 0x10, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x222, 0x18, PWR_MODE_ANY), + PHY_TRSV_REG_CFG_AUTOV920(0x246, 0x01, PWR_MODE_ANY), + END_UFS_PHY_CFG, + }; + + for (i = 0; i < RETRY_CNT; i++) { + udelay(DELAY_IN_US); + + reg = readl(ufs_phy->reg_pma + EXYNOSAUTOV920_CDR_LOCK_OFFSET + + (PHY_APB_ADDR(PHY_EXYNOSAUTOV920_LANE_OFFSET) * lane)); + + if ((reg & EXYNOSAUTOV920_CDR_LOCK_MASK) + == EXYNOSAUTOV920_CDR_LOCK_MASK) { + samsung_ufs_phy_config(ufs_phy, &cfg[2], lane); + return 0; + } + + udelay(DELAY_IN_US); + + /* Disable and enable CDR */ + samsung_ufs_phy_config(ufs_phy, &cfg[0], lane); + samsung_ufs_phy_config(ufs_phy, &cfg[1], lane); + } + + dev_err(ufs_phy->dev, "failed to get phy cdr lock\n"); + return -ETIMEDOUT; +} + +static const struct samsung_ufs_phy_cfg *exynosautov920_ufs_phy_cfgs[CFG_TAG_MAX] = { + [CFG_PRE_INIT] = exynosautov920_pre_init_cfg, + [CFG_PRE_PWR_HS] = exynosautov920_pre_pwr_hs_cfg, + [CFG_POST_PWR_HS] = exynosautov920_post_pwr_hs_cfg, +}; + +static const char * const exynosautov920_ufs_phy_clks[] = { + "ref_clk", +}; + +const struct samsung_ufs_phy_drvdata exynosautov920_ufs_phy = { + .cfgs = exynosautov920_ufs_phy_cfgs, + .isol = { + .offset = EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CTRL, + .mask = EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CTRL_MASK, + .en = EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CTRL_EN, + }, + .clk_list = exynosautov920_ufs_phy_clks, + .num_clks = ARRAY_SIZE(exynosautov920_ufs_phy_clks), + .cdr_lock_status_offset = EXYNOSAUTOV920_EMBEDDED_COMBO_PHY_CDR_LOCK_STATUS, + .wait_for_cdr = exynosautov920_ufs_phy_wait_cdr_lock, +}; diff --git a/drivers/phy/samsung/phy-samsung-ufs.c b/drivers/phy/samsung/phy-samsung-ufs.c index 6c5d41552649..c13fe149bc75 100644 --- a/drivers/phy/samsung/phy-samsung-ufs.c +++ b/drivers/phy/samsung/phy-samsung-ufs.c @@ -28,9 +28,9 @@ #define PHY_DEF_LANE_CNT 1 -static void samsung_ufs_phy_config(struct samsung_ufs_phy *phy, - const struct samsung_ufs_phy_cfg *cfg, - u8 lane) +void samsung_ufs_phy_config(struct samsung_ufs_phy *phy, + const struct samsung_ufs_phy_cfg *cfg, + u8 lane) { enum {LANE_0, LANE_1}; /* lane index */ @@ -323,6 +323,9 @@ static const struct of_device_id samsung_ufs_phy_match[] = { }, { .compatible = "samsung,exynosautov9-ufs-phy", .data = &exynosautov9_ufs_phy, + }, { + .compatible = "samsung,exynosautov920-ufs-phy", + .data = &exynosautov920_ufs_phy, }, { .compatible = "tesla,fsd-ufs-phy", .data = &fsd_ufs_phy, diff --git a/drivers/phy/samsung/phy-samsung-ufs.h b/drivers/phy/samsung/phy-samsung-ufs.h index 9b7deef6e10f..a28f148081d1 100644 --- a/drivers/phy/samsung/phy-samsung-ufs.h +++ b/drivers/phy/samsung/phy-samsung-ufs.h @@ -143,9 +143,13 @@ static inline void samsung_ufs_phy_ctrl_isol( } int samsung_ufs_phy_wait_for_lock_acq(struct phy *phy, u8 lane); +int exynosautov920_ufs_phy_wait_cdr_lock(struct phy *phy, u8 lane); +void samsung_ufs_phy_config(struct samsung_ufs_phy *phy, + const struct samsung_ufs_phy_cfg *cfg, u8 lane); extern const struct samsung_ufs_phy_drvdata exynos7_ufs_phy; extern const struct samsung_ufs_phy_drvdata exynosautov9_ufs_phy; +extern const struct samsung_ufs_phy_drvdata exynosautov920_ufs_phy; extern const struct samsung_ufs_phy_drvdata fsd_ufs_phy; extern const struct samsung_ufs_phy_drvdata tensor_gs101_ufs_phy; -- 2.45.2 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* [PATCH v4 3/3] arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC 2024-12-26 3:11 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver Sowon Na 2024-12-26 3:11 ` [PATCH v4 1/3] dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings Sowon Na 2024-12-26 3:11 ` [PATCH v4 2/3] phy: samsung-ufs: support ExynosAutov920 ufs phy driver Sowon Na @ 2024-12-26 3:11 ` Sowon Na 2025-02-14 7:22 ` Krzysztof Kozlowski 2025-01-13 7:25 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 나소원/SOWON NA 2025-02-13 18:17 ` (subset) " Vinod Koul 4 siblings, 1 reply; 9+ messages in thread From: Sowon Na @ 2024-12-26 3:11 UTC (permalink / raw) To: robh, krzk, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, sowon.na Add UFS Phy for ExynosAutov920 Like ExynosAutov9, this also uses fixed-rate clock nodes until clock driver has been supported. The clock nodes are initialized on bootloader stage thus we don't need to control them so far. Signed-off-by: Sowon Na <sowon.na@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> --- arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi index eb446cdc4ab6..c761e0a1c2c4 100644 --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi @@ -444,6 +444,17 @@ pinctrl_aud: pinctrl@1a460000 { compatible = "samsung,exynosautov920-pinctrl"; reg = <0x1a460000 0x10000>; }; + + ufs_0_phy: phy@16e04000 { + compatible = "samsung,exynosautov920-ufs-phy"; + reg = <0x16e04000 0x4000>; + reg-names = "phy-pma"; + clocks = <&xtcxo>; + clock-names = "ref_clk"; + samsung,pmu-syscon = <&pmu_system_controller>; + #phy-cells = <0>; + status = "disabled"; + }; }; timer { -- 2.45.2 ^ permalink raw reply related [flat|nested] 9+ messages in thread
* Re: [PATCH v4 3/3] arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC 2024-12-26 3:11 ` [PATCH v4 3/3] arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC Sowon Na @ 2025-02-14 7:22 ` Krzysztof Kozlowski 0 siblings, 0 replies; 9+ messages in thread From: Krzysztof Kozlowski @ 2025-02-14 7:22 UTC (permalink / raw) To: Sowon Na, robh, conor+dt, vkoul, alim.akhtar, kishon Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc On 26/12/2024 04:11, Sowon Na wrote: > Add UFS Phy for ExynosAutov920 > > Like ExynosAutov9, this also uses fixed-rate clock nodes until clock driver > has been supported. The clock nodes are initialized on bootloader stage > thus we don't need to control them so far. > > Signed-off-by: Sowon Na <sowon.na@samsung.com> > Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> > --- > arch/arm64/boot/dts/exynos/exynosautov920.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > index eb446cdc4ab6..c761e0a1c2c4 100644 > --- a/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > +++ b/arch/arm64/boot/dts/exynos/exynosautov920.dtsi > @@ -444,6 +444,17 @@ pinctrl_aud: pinctrl@1a460000 { > compatible = "samsung,exynosautov920-pinctrl"; > reg = <0x1a460000 0x10000>; > }; > + > + ufs_0_phy: phy@16e04000 { Incorrectly placed - not ordered. Don't add new stuff to the end of lists, files, etc. Entire file is sorted by unit address. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 2024-12-26 3:11 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver Sowon Na ` (2 preceding siblings ...) 2024-12-26 3:11 ` [PATCH v4 3/3] arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC Sowon Na @ 2025-01-13 7:25 ` 나소원/SOWON NA 2025-02-05 4:32 ` Alim Akhtar 2025-02-13 18:17 ` (subset) " Vinod Koul 4 siblings, 1 reply; 9+ messages in thread From: 나소원/SOWON NA @ 2025-01-13 7:25 UTC (permalink / raw) To: vkoul Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, robh, krzk, conor+dt, alim.akhtar, kishon Hi Vinod, > -----Original Message----- > From: Sowon Na <sowon.na@samsung.com> > Sent: Thursday, December 26, 2024 12:12 PM > To: robh@kernel.org; krzk@kernel.org; conor+dt@kernel.org; > vkoul@kernel.org; alim.akhtar@samsung.com; kishon@kernel.org > Cc: krzk+dt@kernel.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; > sowon.na@samsung.com > Subject: [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver > > This patchset introduces ExynosAuto v920 SoC ufs phy driver as Generic PHY > driver framework. > > Changes from v3: > - Use lower case for all addresses > - Add empty line between macro and function > > Changes from v2: > - simplify function name from samsung_exynosautov920_ufs_phy_wait_cdr_lock > to exynosautov920_ufs_phy_wait_cdr_lock > - return immediately after getting the CDR lock > - add comment for wait CDR lock > > Changes from v1: > - use exynosautov920 instead of exynosauto to specify > - remove obvious comment > - change soc name as ExynosAutov920 to keep consistent > - use macros instead of magic numbers > - specify function name > - add error handling for CDR lock failure > > > Sowon Na (3): > dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings > phy: samsung-ufs: support ExynosAutov920 ufs phy driver > arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC > > .../bindings/phy/samsung,ufs-phy.yaml | 1 + > .../arm64/boot/dts/exynos/exynosautov920.dtsi | 11 ++ > drivers/phy/samsung/Makefile | 1 + > drivers/phy/samsung/phy-exynosautov920-ufs.c | 168 ++++++++++++++++++ > drivers/phy/samsung/phy-samsung-ufs.c | 9 +- > drivers/phy/samsung/phy-samsung-ufs.h | 4 + > 6 files changed, 191 insertions(+), 3 deletions(-) create mode 100644 > drivers/phy/samsung/phy-exynosautov920-ufs.c > > -- > 2.45.2 > I can't see these patches in -next yet, do let me know if anything is missing to be addressed from myside. Best regards, Sowon Na. ^ permalink raw reply [flat|nested] 9+ messages in thread
* RE: [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 2025-01-13 7:25 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 나소원/SOWON NA @ 2025-02-05 4:32 ` Alim Akhtar 2025-02-05 7:28 ` Krzysztof Kozlowski 0 siblings, 1 reply; 9+ messages in thread From: Alim Akhtar @ 2025-02-05 4:32 UTC (permalink / raw) To: '나소원/SOWON NA', vkoul Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, robh, krzk, conor+dt, kishon Hello Krzysztof / Vinod > -----Original Message----- > From: 나소원/SOWON NA <sowon.na@samsung.com> > Sent: Monday, January 13, 2025 12:55 PM > To: vkoul@kernel.org > Cc: krzk+dt@kernel.org; linux-kernel@vger.kernel.org; > devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; > robh@kernel.org; krzk@kernel.org; conor+dt@kernel.org; > alim.akhtar@samsung.com; kishon@kernel.org > Subject: RE: [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver > > Hi Vinod, > > > -----Original Message----- > > From: Sowon Na <sowon.na@samsung.com> > [Snip] > I can't see these patches in -next yet, do let me know if anything is missing to > be addressed from myside. > Which tree will this series go through? > Best regards, > Sowon Na. ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 2025-02-05 4:32 ` Alim Akhtar @ 2025-02-05 7:28 ` Krzysztof Kozlowski 0 siblings, 0 replies; 9+ messages in thread From: Krzysztof Kozlowski @ 2025-02-05 7:28 UTC (permalink / raw) To: Alim Akhtar, '나소원/SOWON NA', vkoul Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc, robh, conor+dt, kishon On 05/02/2025 05:32, Alim Akhtar wrote: > Hello Krzysztof / Vinod > >> -----Original Message----- >> From: 나소원/SOWON NA <sowon.na@samsung.com> >> Sent: Monday, January 13, 2025 12:55 PM >> To: vkoul@kernel.org >> Cc: krzk+dt@kernel.org; linux-kernel@vger.kernel.org; >> devicetree@vger.kernel.org; linux-samsung-soc@vger.kernel.org; >> robh@kernel.org; krzk@kernel.org; conor+dt@kernel.org; >> alim.akhtar@samsung.com; kishon@kernel.org >> Subject: RE: [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver >> >> Hi Vinod, >> >>> -----Original Message----- >>> From: Sowon Na <sowon.na@samsung.com> >> > [Snip] >> I can't see these patches in -next yet, do let me know if anything is missing to >> be addressed from myside. >> > Which tree will this series go through? phy goes through phy. I take the DTS once the bindings got accepted. I cannot take it earlier for obvious reasons - warnings. Best regards, Krzysztof ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: (subset) [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 2024-12-26 3:11 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver Sowon Na ` (3 preceding siblings ...) 2025-01-13 7:25 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 나소원/SOWON NA @ 2025-02-13 18:17 ` Vinod Koul 4 siblings, 0 replies; 9+ messages in thread From: Vinod Koul @ 2025-02-13 18:17 UTC (permalink / raw) To: robh, krzk, conor+dt, alim.akhtar, kishon, Sowon Na Cc: krzk+dt, linux-kernel, devicetree, linux-samsung-soc On Thu, 26 Dec 2024 12:11:35 +0900, Sowon Na wrote: > This patchset introduces ExynosAuto v920 SoC ufs phy driver as > Generic PHY driver framework. > > Changes from v3: > - Use lower case for all addresses > - Add empty line between macro and function > > [...] Applied, thanks! [1/3] dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings commit: 0ee54dcfe76760a65d86437f66df7f93b8b81903 [2/3] phy: samsung-ufs: support ExynosAutov920 ufs phy driver commit: d2317767723b63d28e3b93da92760b7934935536 Best regards, -- ~Vinod ^ permalink raw reply [flat|nested] 9+ messages in thread
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2024-12-26 3:11 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver Sowon Na
2024-12-26 3:11 ` [PATCH v4 1/3] dt-bindings: phy: Add ExynosAutov920 UFS PHY bindings Sowon Na
2024-12-26 3:11 ` [PATCH v4 2/3] phy: samsung-ufs: support ExynosAutov920 ufs phy driver Sowon Na
2024-12-26 3:11 ` [PATCH v4 3/3] arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC Sowon Na
2025-02-14 7:22 ` Krzysztof Kozlowski
2025-01-13 7:25 ` [PATCH v4 0/3] Support ExynosAutov920 ufs phy driver 나소원/SOWON NA
2025-02-05 4:32 ` Alim Akhtar
2025-02-05 7:28 ` Krzysztof Kozlowski
2025-02-13 18:17 ` (subset) " Vinod Koul
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