* [PATCH v2 1/5] ARM: dts: at91: use clock-controller name for PMC nodes
2023-05-08 10:47 [PATCH v2 0/5] dt-bindings: clocks: at91: convert to yaml Claudiu Beznea
@ 2023-05-08 10:47 ` Claudiu Beznea
2023-05-08 10:47 ` [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml Claudiu Beznea
` (3 subsequent siblings)
4 siblings, 0 replies; 11+ messages in thread
From: Claudiu Beznea @ 2023-05-08 10:47 UTC (permalink / raw)
To: mturquette, sboyd, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
Use clock-controller generic name for PMC nodes.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g20.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g25.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g35.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x25.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x35.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sam9x60.dtsi | 2 +-
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d3_emac.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/boot/dts/sama7g5.dtsi | 2 +-
19 files changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 6f9004ebf424..37b500f6f395 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -102,7 +102,7 @@ ramc0: ramc@ffffff00 {
reg = <0xffffff00 0x100>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91rm9200-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index 789fe356dbf6..16e3b24b4ddd 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -115,7 +115,7 @@ matrix: matrix@ffffee00 {
reg = <0xffffee00 0x200>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9260-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index ee0bd1aceb3f..fe9ead867e2a 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -599,7 +599,7 @@ pioC: gpio@fffff800 {
};
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9261-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 3ce9ea987312..ee5e6ed44dd4 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -101,7 +101,7 @@ aic: interrupt-controller@fffff000 {
atmel,external-irqs = <30 31>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9263-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index 708e1646b7f4..738a43ffd228 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -41,7 +41,7 @@ adc0: adc@fffe0000 {
atmel,adc-startup-time = <40>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9g20-pmc", "atmel,at91sam9260-pmc", "syscon";
};
};
diff --git a/arch/arm/boot/dts/at91sam9g25.dtsi b/arch/arm/boot/dts/at91sam9g25.dtsi
index d2f13afb35ea..ec3c77221881 100644
--- a/arch/arm/boot/dts/at91sam9g25.dtsi
+++ b/arch/arm/boot/dts/at91sam9g25.dtsi
@@ -26,7 +26,7 @@ pinctrl@fffff400 {
>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9g25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
diff --git a/arch/arm/boot/dts/at91sam9g35.dtsi b/arch/arm/boot/dts/at91sam9g35.dtsi
index 48c2bc4a7753..c9cfb93092ee 100644
--- a/arch/arm/boot/dts/at91sam9g35.dtsi
+++ b/arch/arm/boot/dts/at91sam9g35.dtsi
@@ -25,7 +25,7 @@ pinctrl@fffff400 {
>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 95f5d76234db..76afeb31b7f5 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -129,7 +129,7 @@ matrix: matrix@ffffea00 {
reg = <0xffffea00 0x200>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9g45-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index 83114d26f10d..c2e7460fb7ff 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -118,7 +118,7 @@ smc: smc@ffffea00 {
reg = <0xffffea00 0x200>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9n12-pmc", "syscon";
reg = <0xfffffc00 0x200>;
#clock-cells = <2>;
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 364a2ff0a763..a12e6c419fe3 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -763,7 +763,7 @@ pioD: gpio@fffffa00 {
};
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9rl-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/at91sam9x25.dtsi b/arch/arm/boot/dts/at91sam9x25.dtsi
index 0fe8802e1242..7036f5f04571 100644
--- a/arch/arm/boot/dts/at91sam9x25.dtsi
+++ b/arch/arm/boot/dts/at91sam9x25.dtsi
@@ -27,7 +27,7 @@ pinctrl@fffff400 {
>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9x25-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
diff --git a/arch/arm/boot/dts/at91sam9x35.dtsi b/arch/arm/boot/dts/at91sam9x35.dtsi
index 0bfa21f18f87..eb03b0497e37 100644
--- a/arch/arm/boot/dts/at91sam9x35.dtsi
+++ b/arch/arm/boot/dts/at91sam9x35.dtsi
@@ -26,7 +26,7 @@ pinctrl@fffff400 {
>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9x35-pmc", "atmel,at91sam9x5-pmc", "syscon";
};
};
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 0c26c925761b..af19ef2a875c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -126,7 +126,7 @@ smc: smc@ffffea00 {
reg = <0xffffea00 0x200>;
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,at91sam9x5-pmc", "syscon";
reg = <0xfffffc00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index 8f5477e307dd..6f5177df01bc 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -660,7 +660,7 @@ pioD: gpio@fffffa00 {
};
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "microchip,sam9x60-pmc", "syscon";
reg = <0xfffffc00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 14c35c12a115..86009dd28e62 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -284,7 +284,7 @@ dma1: dma-controller@f0004000 {
clock-names = "dma_clk";
};
- pmc: pmc@f0014000 {
+ pmc: clock-controller@f0014000 {
compatible = "atmel,sama5d2-pmc", "syscon";
reg = <0xf0014000 0x160>;
interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index bde8e92d60bb..4524a16322d1 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1001,7 +1001,7 @@ pioE: gpio@fffffa00 {
};
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
compatible = "atmel,sama5d3-pmc", "syscon";
reg = <0xfffffc00 0x120>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/sama5d3_emac.dtsi b/arch/arm/boot/dts/sama5d3_emac.dtsi
index 45226108850d..5d7ce13de8cc 100644
--- a/arch/arm/boot/dts/sama5d3_emac.dtsi
+++ b/arch/arm/boot/dts/sama5d3_emac.dtsi
@@ -30,7 +30,7 @@ AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A EMDC, conflicts with
};
};
- pmc: pmc@fffffc00 {
+ pmc: clock-controller@fffffc00 {
};
macb1: ethernet@f802c000 {
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index af62157ae214..e94f3a661f4b 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -250,7 +250,7 @@ dma0: dma-controller@f0014000 {
clock-names = "dma_clk";
};
- pmc: pmc@f0018000 {
+ pmc: clock-controller@f0018000 {
compatible = "atmel,sama5d4-pmc", "syscon";
reg = <0xf0018000 0x120>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
index ab131762ecb5..f0478a43edc2 100644
--- a/arch/arm/boot/dts/sama7g5.dtsi
+++ b/arch/arm/boot/dts/sama7g5.dtsi
@@ -241,7 +241,7 @@ pioA: pinctrl@e0014000 {
clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
};
- pmc: pmc@e0018000 {
+ pmc: clock-controller@e0018000 {
compatible = "microchip,sama7g5-pmc", "syscon";
reg = <0xe0018000 0x200>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
2023-05-08 10:47 [PATCH v2 0/5] dt-bindings: clocks: at91: convert to yaml Claudiu Beznea
2023-05-08 10:47 ` [PATCH v2 1/5] ARM: dts: at91: use clock-controller name for PMC nodes Claudiu Beznea
@ 2023-05-08 10:47 ` Claudiu Beznea
2023-05-08 11:27 ` Rob Herring
2023-05-08 16:26 ` Krzysztof Kozlowski
2023-05-08 10:47 ` [PATCH v2 3/5] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings Claudiu Beznea
` (2 subsequent siblings)
4 siblings, 2 replies; 11+ messages in thread
From: Claudiu Beznea @ 2023-05-08 10:47 UTC (permalink / raw)
To: mturquette, sboyd, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
Convert Atmel PMC documentation to yaml.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
.../devicetree/bindings/clock/at91-clock.txt | 28 ----
.../bindings/clock/atmel,at91rm9200-pmc.yaml | 154 ++++++++++++++++++
2 files changed, 154 insertions(+), 28 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
index 13f45db3b66d..57394785d3b0 100644
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
@@ -28,31 +28,3 @@ For example:
#clock-cells = <0>;
};
-Power Management Controller (PMC):
-
-Required properties:
-- compatible : shall be "atmel,<chip>-pmc", "syscon" or
- "microchip,sam9x60-pmc"
- <chip> can be: at91rm9200, at91sam9260, at91sam9261,
- at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
- at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
- sama5d2, sama5d3 or sama5d4.
-- #clock-cells : from common clock binding; shall be set to 2. The first entry
- is the type of the clock (core, system, peripheral or generated) and the
- second entry its index as provided by the datasheet
-- clocks : Must contain an entry for each entry in clock-names.
-- clock-names: Must include the following entries: "slow_clk", "main_xtal"
-
-Optional properties:
-- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
- provided on XIN.
-
-For example:
- pmc: pmc@f0018000 {
- compatible = "atmel,sama5d4-pmc", "syscon";
- reg = <0xf0018000 0x120>;
- interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
- #clock-cells = <2>;
- clocks = <&clk32k>, <&main_xtal>;
- clock-names = "slow_clk", "main_xtal";
- };
diff --git a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
new file mode 100644
index 000000000000..58b702520600
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
@@ -0,0 +1,154 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Power Management Controller (PMC)
+
+maintainers:
+ - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+description:
+ The power management controller optimizes power consumption by controlling all
+ system and user peripheral clocks. The PMC enables/disables the clock inputs
+ to many of the peripherals and to the processor.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: atmel,at91sam9260-pmc
+ - const: syscon
+ - items:
+ - enum:
+ - atmel,at91sam9g15-pmc
+ - atmel,at91sam9g20-pmc
+ - atmel,at91sam9g25-pmc
+ - atmel,at91sam9g35-pmc
+ - atmel,at91sam9x25-pmc
+ - atmel,at91sam9x35-pmc
+ - enum:
+ - atmel,at91sam9260-pmc
+ - atmel,at91sam9x5-pmc
+ - const: syscon
+ - items:
+ - enum:
+ - atmel,at91rm9200-pmc
+ - atmel,at91sam9g45-pmc
+ - atmel,at91sam9n12-pmc
+ - atmel,at91sam9rl-pmc
+ - atmel,sama5d2-pmc
+ - atmel,sama5d3-pmc
+ - atmel,sama5d4-pmc
+ - microchip,sam9x60-pmc
+ - microchip,sama7g5-pmc
+ - const: syscon
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ "#clock-cells":
+ description: |
+ - 1st cell is the clock type, one of PMC_TYPE_CORE, PMC_TYPE_SYSTEM,
+ PMC_TYPE_PERIPHERAL, PMC_TYPE_GCK, PMC_TYPE_PROGRAMMABLE (as defined
+ in <dt-bindings/clock/at91.h>)
+ - 2nd cell is the clock identifier as defined in <dt-bindings/clock/at91.h
+ (for core clocks) or as defined in datasheet (for system, peripheral,
+ gck and programmable clocks).
+ const: 2
+
+ clocks:
+ minItems: 2
+ maxItems: 3
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+
+ atmel,osc-bypass:
+ description: set when a clock signal is directly provided on XIN
+ type: boolean
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - "#clock-cells"
+ - clocks
+ - clock-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,sam9x60-pmc
+ - microchip,sama7g5-pmc
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ items:
+ - const: td_slck
+ - const: md_slck
+ - const: main_xtal
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - atmel,at91rm9200-pmc
+ - atmel,at91sam9260-pmc
+ - atmel,at91sam9g20-pmc
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: slow_xtal
+ - const: main_xtal
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - atmel,sama5d4-pmc
+ - atmel,sama5d3-pmc
+ - atmel,sama5d2-pmc
+ then:
+ properties:
+ clocks:
+ minItems: 2
+ maxItems: 2
+ clock-names:
+ items:
+ - const: slow_clk
+ - const: main_xtal
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ pmc: clock-controller@f0018000 {
+ compatible = "atmel,sama5d4-pmc", "syscon";
+ reg = <0xf0018000 0x120>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
+ #clock-cells = <2>;
+ clocks = <&clk32k>, <&main_xtal>;
+ clock-names = "slow_clk", "main_xtal";
+ };
+
+...
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
2023-05-08 10:47 ` [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml Claudiu Beznea
@ 2023-05-08 11:27 ` Rob Herring
2023-05-08 16:22 ` Krzysztof Kozlowski
2023-05-08 16:26 ` Krzysztof Kozlowski
1 sibling, 1 reply; 11+ messages in thread
From: Rob Herring @ 2023-05-08 11:27 UTC (permalink / raw)
To: Claudiu Beznea
Cc: linux-clk, robh+dt, linux-kernel, mturquette, sboyd,
krzysztof.kozlowski+dt, linux-arm-kernel, nicolas.ferre,
alexandre.belloni, devicetree
On Mon, 08 May 2023 13:47:58 +0300, Claudiu Beznea wrote:
> Convert Atmel PMC documentation to yaml.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> .../devicetree/bindings/clock/at91-clock.txt | 28 ----
> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 154 ++++++++++++++++++
> 2 files changed, 154 insertions(+), 28 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
>
My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
on your patch (DT_CHECKER_FLAGS is new in v5.13):
yamllint warnings/errors:
dtschema/dtc warnings/errors:
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.example.dtb: camera-sensor@3c: port:endpoint:data-lanes: [[1]] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/rockchip-isp1.example.dtb: camera@3c: port:endpoint:data-lanes: [[1]] is too short
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml
/builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.example.dtb: pcie-ep@33800000: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
doc reference errors (make refcheckdocs):
Documentation/usb/gadget_uvc.rst: Documentation/userspace-api/media/v4l/pixfmt-packed.yuv.rst
MAINTAINERS: Documentation/devicetree/bindings/pwm/pwm-apple.yaml
See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20230508104801.445261-3-claudiu.beznea@microchip.com
The base for the series is generally the latest rc1. A different dependency
should be noted in *this* patch.
If you already ran 'make dt_binding_check' and didn't see the above
error(s), then make sure 'yamllint' is installed and dt-schema is up to
date:
pip3 install dtschema --upgrade
Please check and re-submit after running the above command yourself. Note
that DT_SCHEMA_FILES can be set to your schema file to speed up checking
your schema. However, it must be unset to test all examples with your schema.
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
2023-05-08 11:27 ` Rob Herring
@ 2023-05-08 16:22 ` Krzysztof Kozlowski
0 siblings, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2023-05-08 16:22 UTC (permalink / raw)
To: Rob Herring, Claudiu Beznea
Cc: linux-clk, robh+dt, linux-kernel, mturquette, sboyd,
krzysztof.kozlowski+dt, linux-arm-kernel, nicolas.ferre,
alexandre.belloni, devicetree
On 08/05/2023 13:27, Rob Herring wrote:
>
> On Mon, 08 May 2023 13:47:58 +0300, Claudiu Beznea wrote:
>> Convert Atmel PMC documentation to yaml.
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> ---
>> .../devicetree/bindings/clock/at91-clock.txt | 28 ----
>> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 154 ++++++++++++++++++
>> 2 files changed, 154 insertions(+), 28 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
>>
>
> My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check'
> on your patch (DT_CHECKER_FLAGS is new in v5.13):
>
> yamllint warnings/errors:
>
> dtschema/dtc warnings/errors:
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.example.dtb: camera-sensor@3c: port:endpoint:data-lanes: [[1]] is too short
> From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/rockchip-isp1.example.dtb: camera@3c: port:endpoint:data-lanes: [[1]] is too short
> From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/media/i2c/ovti,ov2685.yaml
> /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.example.dtb: pcie-ep@33800000: Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
> From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
These can be ignored.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
2023-05-08 10:47 ` [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml Claudiu Beznea
2023-05-08 11:27 ` Rob Herring
@ 2023-05-08 16:26 ` Krzysztof Kozlowski
2023-05-09 5:15 ` Claudiu.Beznea
1 sibling, 1 reply; 11+ messages in thread
From: Krzysztof Kozlowski @ 2023-05-08 16:26 UTC (permalink / raw)
To: Claudiu Beznea, mturquette, sboyd, robh+dt,
krzysztof.kozlowski+dt, nicolas.ferre, alexandre.belloni
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
On 08/05/2023 12:47, Claudiu Beznea wrote:
> Convert Atmel PMC documentation to yaml.
Please mention the changes against original binding. At least
clock-names look different, maybe more.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> .../devicetree/bindings/clock/at91-clock.txt | 28 ----
> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 154 ++++++++++++++++++
> 2 files changed, 154 insertions(+), 28 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
>
> diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
> index 13f45db3b66d..57394785d3b0 100644
> --- a/Documentation/devicetree/bindings/clock/at91-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
> @@ -28,31 +28,3 @@ For example:
> #clock-cells = <0>;
> };
>
> -Power Management Controller (PMC):
> -
> -Required properties:
> -- compatible : shall be "atmel,<chip>-pmc", "syscon" or
> - "microchip,sam9x60-pmc"
> - <chip> can be: at91rm9200, at91sam9260, at91sam9261,
> - at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
> - at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
> - sama5d2, sama5d3 or sama5d4.
> -- #clock-cells : from common clock binding; shall be set to 2. The first entry
> - is the type of the clock (core, system, peripheral or generated) and the
> - second entry its index as provided by the datasheet
> -- clocks : Must contain an entry for each entry in clock-names.
> -- clock-names: Must include the following entries: "slow_clk", "main_xtal"
> -
> -Optional properties:
> -- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
> - provided on XIN.
> -
> -For example:
> - pmc: pmc@f0018000 {
> - compatible = "atmel,sama5d4-pmc", "syscon";
> - reg = <0xf0018000 0x120>;
> - interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
> - #clock-cells = <2>;
> - clocks = <&clk32k>, <&main_xtal>;
> - clock-names = "slow_clk", "main_xtal";
> - };
> diff --git a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
> new file mode 100644
> index 000000000000..58b702520600
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
> @@ -0,0 +1,154 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Atmel Power Management Controller (PMC)
> +
> +maintainers:
> + - Claudiu Beznea <claudiu.beznea@microchip.com>
> +
> +description:
> + The power management controller optimizes power consumption by controlling all
> + system and user peripheral clocks. The PMC enables/disables the clock inputs
> + to many of the peripherals and to the processor.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: atmel,at91sam9260-pmc
> + - const: syscon
No improvements here. Why this is part of this group not the one at the
end? I already talked about this.
> + - items:
> + - enum:
> + - atmel,at91sam9g15-pmc
> + - atmel,at91sam9g20-pmc
> + - atmel,at91sam9g25-pmc
> + - atmel,at91sam9g35-pmc
> + - atmel,at91sam9x25-pmc
> + - atmel,at91sam9x35-pmc
> + - enum:
> + - atmel,at91sam9260-pmc
> + - atmel,at91sam9x5-pmc
> + - const: syscon
> + - items:
> + - enum:
> + - atmel,at91rm9200-pmc
> + - atmel,at91sam9g45-pmc
> + - atmel,at91sam9n12-pmc
> + - atmel,at91sam9rl-pmc
> + - atmel,sama5d2-pmc
> + - atmel,sama5d3-pmc
> + - atmel,sama5d4-pmc
> + - microchip,sam9x60-pmc
> + - microchip,sama7g5-pmc
> + - const: syscon
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + "#clock-cells":
> + description: |
> + - 1st cell is the clock type, one of PMC_TYPE_CORE, PMC_TYPE_SYSTEM,
> + PMC_TYPE_PERIPHERAL, PMC_TYPE_GCK, PMC_TYPE_PROGRAMMABLE (as defined
> + in <dt-bindings/clock/at91.h>)
> + - 2nd cell is the clock identifier as defined in <dt-bindings/clock/at91.h
> + (for core clocks) or as defined in datasheet (for system, peripheral,
> + gck and programmable clocks).
> + const: 2
> +
> + clocks:
> + minItems: 2
> + maxItems: 3
> +
> + clock-names:
> + minItems: 2
> + maxItems: 3
> +
> + atmel,osc-bypass:
> + description: set when a clock signal is directly provided on XIN
> + type: boolean
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - "#clock-cells"
> + - clocks
> + - clock-names
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - microchip,sam9x60-pmc
> + - microchip,sama7g5-pmc
> + then:
> + properties:
> + clocks:
> + minItems: 3
> + maxItems: 3
> + clock-names:
> + items:
> + - const: td_slck
> + - const: md_slck
> + - const: main_xtal
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - atmel,at91rm9200-pmc
> + - atmel,at91sam9260-pmc
> + - atmel,at91sam9g20-pmc
> + then:
> + properties:
> + clocks:
> + minItems: 2
> + maxItems: 2
> + clock-names:
> + items:
> + - const: slow_xtal
> + - const: main_xtal
> +
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - atmel,sama5d4-pmc
> + - atmel,sama5d3-pmc
> + - atmel,sama5d2-pmc
Keep similar order as in compatibles list, e.g. alphanumeric.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
2023-05-08 16:26 ` Krzysztof Kozlowski
@ 2023-05-09 5:15 ` Claudiu.Beznea
0 siblings, 0 replies; 11+ messages in thread
From: Claudiu.Beznea @ 2023-05-09 5:15 UTC (permalink / raw)
To: krzysztof.kozlowski, mturquette, sboyd, robh+dt,
krzysztof.kozlowski+dt, Nicolas.Ferre, alexandre.belloni
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
On 08.05.2023 19:26, Krzysztof Kozlowski wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> On 08/05/2023 12:47, Claudiu Beznea wrote:
>> Convert Atmel PMC documentation to yaml.
>
> Please mention the changes against original binding. At least
> clock-names look different, maybe more.
>
>>
>> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
>> ---
>> .../devicetree/bindings/clock/at91-clock.txt | 28 ----
>> .../bindings/clock/atmel,at91rm9200-pmc.yaml | 154 ++++++++++++++++++
>> 2 files changed, 154 insertions(+), 28 deletions(-)
>> create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
>> index 13f45db3b66d..57394785d3b0 100644
>> --- a/Documentation/devicetree/bindings/clock/at91-clock.txt
>> +++ b/Documentation/devicetree/bindings/clock/at91-clock.txt
>> @@ -28,31 +28,3 @@ For example:
>> #clock-cells = <0>;
>> };
>>
>> -Power Management Controller (PMC):
>> -
>> -Required properties:
>> -- compatible : shall be "atmel,<chip>-pmc", "syscon" or
>> - "microchip,sam9x60-pmc"
>> - <chip> can be: at91rm9200, at91sam9260, at91sam9261,
>> - at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
>> - at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
>> - sama5d2, sama5d3 or sama5d4.
>> -- #clock-cells : from common clock binding; shall be set to 2. The first entry
>> - is the type of the clock (core, system, peripheral or generated) and the
>> - second entry its index as provided by the datasheet
>> -- clocks : Must contain an entry for each entry in clock-names.
>> -- clock-names: Must include the following entries: "slow_clk", "main_xtal"
>> -
>> -Optional properties:
>> -- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
>> - provided on XIN.
>> -
>> -For example:
>> - pmc: pmc@f0018000 {
>> - compatible = "atmel,sama5d4-pmc", "syscon";
>> - reg = <0xf0018000 0x120>;
>> - interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
>> - #clock-cells = <2>;
>> - clocks = <&clk32k>, <&main_xtal>;
>> - clock-names = "slow_clk", "main_xtal";
>> - };
>> diff --git a/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
>> new file mode 100644
>> index 000000000000..58b702520600
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml
>> @@ -0,0 +1,154 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Atmel Power Management Controller (PMC)
>> +
>> +maintainers:
>> + - Claudiu Beznea <claudiu.beznea@microchip.com>
>> +
>> +description:
>> + The power management controller optimizes power consumption by controlling all
>> + system and user peripheral clocks. The PMC enables/disables the clock inputs
>> + to many of the peripherals and to the processor.
>> +
>> +properties:
>> + compatible:
>> + oneOf:
>> + - items:
>> + - const: atmel,at91sam9260-pmc
>> + - const: syscon
>
> No improvements here. Why this is part of this group not the one at the
> end? I already talked about this.
I missed it. It will be handled it in the next version.
>
>> + - items:
>> + - enum:
>> + - atmel,at91sam9g15-pmc
>> + - atmel,at91sam9g20-pmc
>> + - atmel,at91sam9g25-pmc
>> + - atmel,at91sam9g35-pmc
>> + - atmel,at91sam9x25-pmc
>> + - atmel,at91sam9x35-pmc
>> + - enum:
>> + - atmel,at91sam9260-pmc
>> + - atmel,at91sam9x5-pmc
>> + - const: syscon
>> + - items:
>> + - enum:
>> + - atmel,at91rm9200-pmc
>> + - atmel,at91sam9g45-pmc
>> + - atmel,at91sam9n12-pmc
>> + - atmel,at91sam9rl-pmc
>> + - atmel,sama5d2-pmc
>> + - atmel,sama5d3-pmc
>> + - atmel,sama5d4-pmc
>> + - microchip,sam9x60-pmc
>> + - microchip,sama7g5-pmc
>> + - const: syscon
>> +
>> + reg:
>> + maxItems: 1
>> +
>> + interrupts:
>> + maxItems: 1
>> +
>> + "#clock-cells":
>> + description: |
>> + - 1st cell is the clock type, one of PMC_TYPE_CORE, PMC_TYPE_SYSTEM,
>> + PMC_TYPE_PERIPHERAL, PMC_TYPE_GCK, PMC_TYPE_PROGRAMMABLE (as defined
>> + in <dt-bindings/clock/at91.h>)
>> + - 2nd cell is the clock identifier as defined in <dt-bindings/clock/at91.h
>> + (for core clocks) or as defined in datasheet (for system, peripheral,
>> + gck and programmable clocks).
>> + const: 2
>> +
>> + clocks:
>> + minItems: 2
>> + maxItems: 3
>> +
>> + clock-names:
>> + minItems: 2
>> + maxItems: 3
>> +
>> + atmel,osc-bypass:
>> + description: set when a clock signal is directly provided on XIN
>> + type: boolean
>> +
>> +required:
>> + - compatible
>> + - reg
>> + - interrupts
>> + - "#clock-cells"
>> + - clocks
>> + - clock-names
>> +
>> +allOf:
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - microchip,sam9x60-pmc
>> + - microchip,sama7g5-pmc
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 3
>> + maxItems: 3
>> + clock-names:
>> + items:
>> + - const: td_slck
>> + - const: md_slck
>> + - const: main_xtal
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - atmel,at91rm9200-pmc
>> + - atmel,at91sam9260-pmc
>> + - atmel,at91sam9g20-pmc
>> + then:
>> + properties:
>> + clocks:
>> + minItems: 2
>> + maxItems: 2
>> + clock-names:
>> + items:
>> + - const: slow_xtal
>> + - const: main_xtal
>> +
>> + - if:
>> + properties:
>> + compatible:
>> + contains:
>> + enum:
>> + - atmel,sama5d4-pmc
>> + - atmel,sama5d3-pmc
>> + - atmel,sama5d2-pmc
>
> Keep similar order as in compatibles list, e.g. alphanumeric.
>
> Best regards,
> Krzysztof
>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 3/5] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings
2023-05-08 10:47 [PATCH v2 0/5] dt-bindings: clocks: at91: convert to yaml Claudiu Beznea
2023-05-08 10:47 ` [PATCH v2 1/5] ARM: dts: at91: use clock-controller name for PMC nodes Claudiu Beznea
2023-05-08 10:47 ` [PATCH v2 2/5] dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml Claudiu Beznea
@ 2023-05-08 10:47 ` Claudiu Beznea
2023-05-08 10:48 ` [PATCH v2 4/5] ARM: dts: at91: use clock-controller name for sckc nodes Claudiu Beznea
2023-05-08 10:48 ` [PATCH v2 5/5] dt-bindings: clocks: at91sam9x5-sckc: convert to yaml Claudiu Beznea
4 siblings, 0 replies; 11+ messages in thread
From: Claudiu Beznea @ 2023-05-08 10:47 UTC (permalink / raw)
To: mturquette, sboyd, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
Switch slow clock controller to new clock bindings.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/at91sam9n12.dtsi | 23 +++--------------------
1 file changed, 3 insertions(+), 20 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2e7460fb7ff..0e28101b26bf 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -146,28 +146,11 @@ shdwc@fffffe10 {
clocks = <&clk32k>;
};
- sckc@fffffe50 {
+ clk32k: clock-controller@fffffe50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffe50 0x4>;
-
- slow_osc: slow_osc {
- compatible = "atmel,at91sam9x5-clk-slow-osc";
- #clock-cells = <0>;
- clocks = <&slow_xtal>;
- };
-
- slow_rc_osc: slow_rc_osc {
- compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
- #clock-cells = <0>;
- clock-frequency = <32768>;
- clock-accuracy = <50000000>;
- };
-
- clk32k: slck {
- compatible = "atmel,at91sam9x5-clk-slow";
- #clock-cells = <0>;
- clocks = <&slow_rc_osc>, <&slow_osc>;
- };
+ clocks = <&slow_xtal>;
+ #clock-cells = <0>;
};
mmc0: mmc@f0008000 {
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 4/5] ARM: dts: at91: use clock-controller name for sckc nodes
2023-05-08 10:47 [PATCH v2 0/5] dt-bindings: clocks: at91: convert to yaml Claudiu Beznea
` (2 preceding siblings ...)
2023-05-08 10:47 ` [PATCH v2 3/5] ARM: dts: at91: at91sam9n12: witch sckc to new clock bindings Claudiu Beznea
@ 2023-05-08 10:48 ` Claudiu Beznea
2023-05-08 10:48 ` [PATCH v2 5/5] dt-bindings: clocks: at91sam9x5-sckc: convert to yaml Claudiu Beznea
4 siblings, 0 replies; 11+ messages in thread
From: Claudiu Beznea @ 2023-05-08 10:48 UTC (permalink / raw)
To: mturquette, sboyd, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
Use clock-controller generic name for slow clock controller nodes.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sam9x60.dtsi | 2 +-
arch/arm/boot/dts/sama5d2.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
7 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index 76afeb31b7f5..498cb92b29f9 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -923,7 +923,7 @@ usb2: gadget@fff78000 {
status = "disabled";
};
- clk32k: sckc@fffffd50 {
+ clk32k: clock-controller@fffffd50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffd50 0x4>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index a12e6c419fe3..d7e8a115c916 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -799,7 +799,7 @@ watchdog@fffffd40 {
status = "disabled";
};
- clk32k: sckc@fffffd50 {
+ clk32k: clock-controller@fffffd50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffd50 0x4>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index af19ef2a875c..0123ee47151c 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -154,7 +154,7 @@ pit: timer@fffffe30 {
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
- clk32k: sckc@fffffe50 {
+ clk32k: clock-controller@fffffe50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/sam9x60.dtsi b/arch/arm/boot/dts/sam9x60.dtsi
index 6f5177df01bc..933d73505a8b 100644
--- a/arch/arm/boot/dts/sam9x60.dtsi
+++ b/arch/arm/boot/dts/sam9x60.dtsi
@@ -700,7 +700,7 @@ pit: timer@fffffe40 {
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
- clk32k: sckc@fffffe50 {
+ clk32k: clock-controller@fffffe50 {
compatible = "microchip,sam9x60-sckc";
reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi
index 86009dd28e62..5f632e3f039e 100644
--- a/arch/arm/boot/dts/sama5d2.dtsi
+++ b/arch/arm/boot/dts/sama5d2.dtsi
@@ -704,7 +704,7 @@ watchdog: watchdog@f8048040 {
status = "disabled";
};
- clk32k: sckc@f8048050 {
+ clk32k: clock-controller@f8048050 {
compatible = "atmel,sama5d4-sckc";
reg = <0xf8048050 0x4>;
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 4524a16322d1..0eebf6c760b3 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1040,7 +1040,7 @@ watchdog: watchdog@fffffe40 {
status = "disabled";
};
- clk32k: sckc@fffffe50 {
+ clk32k: clock-controller@fffffe50 {
compatible = "atmel,sama5d3-sckc";
reg = <0xfffffe50 0x4>;
clocks = <&slow_xtal>;
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index e94f3a661f4b..de6c82969232 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -761,7 +761,7 @@ watchdog: watchdog@fc068640 {
status = "disabled";
};
- clk32k: sckc@fc068650 {
+ clk32k: clock-controller@fc068650 {
compatible = "atmel,sama5d4-sckc";
reg = <0xfc068650 0x4>;
#clock-cells = <0>;
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v2 5/5] dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
2023-05-08 10:47 [PATCH v2 0/5] dt-bindings: clocks: at91: convert to yaml Claudiu Beznea
` (3 preceding siblings ...)
2023-05-08 10:48 ` [PATCH v2 4/5] ARM: dts: at91: use clock-controller name for sckc nodes Claudiu Beznea
@ 2023-05-08 10:48 ` Claudiu Beznea
2023-05-08 16:27 ` Krzysztof Kozlowski
4 siblings, 1 reply; 11+ messages in thread
From: Claudiu Beznea @ 2023-05-08 10:48 UTC (permalink / raw)
To: mturquette, sboyd, robh+dt, krzysztof.kozlowski+dt, nicolas.ferre,
alexandre.belloni, claudiu.beznea
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
Convert Atmel slow clock controller documentation to yaml.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
.../devicetree/bindings/clock/at91-clock.txt | 30 --------
.../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 +++++++++++++++++++
2 files changed, 70 insertions(+), 30 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
diff --git a/Documentation/devicetree/bindings/clock/at91-clock.txt b/Documentation/devicetree/bindings/clock/at91-clock.txt
deleted file mode 100644
index 57394785d3b0..000000000000
--- a/Documentation/devicetree/bindings/clock/at91-clock.txt
+++ /dev/null
@@ -1,30 +0,0 @@
-Device Tree Clock bindings for arch-at91
-
-This binding uses the common clock binding[1].
-
-[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Slow Clock controller:
-
-Required properties:
-- compatible : shall be one of the following:
- "atmel,at91sam9x5-sckc",
- "atmel,sama5d3-sckc",
- "atmel,sama5d4-sckc" or
- "microchip,sam9x60-sckc":
- at91 SCKC (Slow Clock Controller)
-- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
-- clocks : shall be the input parent clock phandle for the clock.
-
-Optional properties:
-- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
- provided on XIN.
-
-For example:
- sckc@fffffe50 {
- compatible = "atmel,at91sam9x5-sckc";
- reg = <0xfffffe50 0x4>;
- clocks = <&slow_xtal>;
- #clock-cells = <0>;
- };
-
diff --git a/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
new file mode 100644
index 000000000000..7be29877e6d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
@@ -0,0 +1,70 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel Slow Clock Controller (SCKC)
+
+maintainers:
+ - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+properties:
+ compatible:
+ oneOf:
+ - enum:
+ - atmel,at91sam9x5-sckc
+ - atmel,sama5d3-sckc
+ - atmel,sama5d4-sckc
+ - microchip,sam9x60-sckc
+ - items:
+ - const: microchip,sama7g5-sckc
+ - const: microchip,sam9x60-sckc
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ "#clock-cells":
+ enum: [0, 1]
+
+ atmel,osc-bypass:
+ type: boolean
+ description: set when a clock signal is directly provided on XIN
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - "#clock-cells"
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - microchip,sam9x60-sckc
+ then:
+ properties:
+ "#clock-cells":
+ const: 1
+ else:
+ properties:
+ "#clock-cells":
+ const: 0
+
+additionalProperties: false
+
+examples:
+ - |
+ clk32k: clock-controller@fffffe50 {
+ compatible = "microchip,sam9x60-sckc";
+ reg = <0xfffffe50 0x4>;
+ clocks = <&slow_xtal>;
+ #clock-cells = <1>;
+ };
+
+...
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v2 5/5] dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
2023-05-08 10:48 ` [PATCH v2 5/5] dt-bindings: clocks: at91sam9x5-sckc: convert to yaml Claudiu Beznea
@ 2023-05-08 16:27 ` Krzysztof Kozlowski
0 siblings, 0 replies; 11+ messages in thread
From: Krzysztof Kozlowski @ 2023-05-08 16:27 UTC (permalink / raw)
To: Claudiu Beznea, mturquette, sboyd, robh+dt,
krzysztof.kozlowski+dt, nicolas.ferre, alexandre.belloni
Cc: linux-clk, devicetree, linux-arm-kernel, linux-kernel
On 08/05/2023 12:48, Claudiu Beznea wrote:
> Convert Atmel slow clock controller documentation to yaml.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
> .../devicetree/bindings/clock/at91-clock.txt | 30 --------
> .../bindings/clock/atmel,at91sam9x5-sckc.yaml | 70 +++++++++++++++++++
> 2 files changed, 70 insertions(+), 30 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/clock/at91-clock.txt
> create mode 100644 Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml
>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 11+ messages in thread