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Tue, 15 Nov 2022 02:19:50 -0800 (PST) Received: from [192.168.31.208] ([194.29.137.22]) by smtp.gmail.com with ESMTPSA id i15-20020a056512340f00b004b4a0482a48sm490918lfr.139.2022.11.15.02.19.49 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 15 Nov 2022 02:19:50 -0800 (PST) Message-ID: <096f390b-39e7-302b-ec54-3301cadd39aa@linaro.org> Date: Tue, 15 Nov 2022 11:19:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 2/3] arm64: dts: qcom: sm8450: add Soundwire and LPASS To: Krzysztof Kozlowski , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Srinivas Kandagatla References: <20221114152130.385871-1-krzysztof.kozlowski@linaro.org> <20221114152130.385871-3-krzysztof.kozlowski@linaro.org> From: Konrad Dybcio In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15/11/2022 11:15, Krzysztof Kozlowski wrote: > On 14/11/2022 16:37, Konrad Dybcio wrote: >> >> On 14/11/2022 16:21, Krzysztof Kozlowski wrote: >>> From: Srinivas Kandagatla >>> >>> Add Soundwire controllers, Low Power Audio SubSystem (LPASS) devices and >>> LPASS pin controller. >>> >>> Signed-off-by: Srinivas Kandagatla >>> Co-developed-by: Krzysztof Kozlowski >>> Signed-off-by: Krzysztof Kozlowski >>> --- >>> arch/arm64/boot/dts/qcom/sm8450.dtsi | 295 +++++++++++++++++++++++++++ >>> 1 file changed, 295 insertions(+) >>> >>> diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi >>> index 4b0a1eee8bd9..c99740591467 100644 >>> --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi >>> +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi >>> @@ -15,6 +15,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> >>> / { >>> @@ -2097,6 +2098,212 @@ compute-cb@3 { >>> }; >>> }; >>> >>> + wsa2macro: codec@31e0000 { >>> + compatible = "qcom,sm8450-lpass-wsa-macro"; >>> + reg = <0 0x031e0000 0 0x1000>; >> The sorting will be off, as adsp and cdsp have been mistakenly put in >> the wrong place (notice adsp @ 32300000 is actually at an address >> that's 8 hex digits long, but the reg addr is padded to 9 hex digits..). > > I don't get it. This has address: > 31e0000 > ADSP has > 30000000 > > so why sorting is odd? It's gonna be fine, you're right, I can't read properly... Konrad > >>> Could you submit a fix for that as well? > > For 9 digits, sure, but this is independent issue. > >> >>> + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&vamacro>; >>> + clock-names = "mclk", "npl", "macro", "dcodec", "fsgen"; >>> + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, >>> + <&q6prmcc LPASS_CLK_ID_RX_CORE_MCLK2_2X_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; >> >> Remove the duplicated space before LPASS_CLK_ATTRIBUTE_COUPLE_NO. > > Ack. > > > Best regards, > Krzysztof >