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From: Georgi Djakov <djakov@kernel.org>
To: Aaron Kling <webgeek1234@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Sibi Sankar <sibi.sankar@oss.qualcomm.com>,
	linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	Neil Armstrong <neil.armstrong@linaro.org>,
	Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH v3 0/2] arm64: qcom: sm8550: add DDR, LLCC & L3 CPU bandwidth scaling
Date: Wed, 11 Mar 2026 15:45:55 +0200	[thread overview]
Message-ID: <09904716-69d3-4ecb-8bf6-6e2283631326@kernel.org> (raw)
In-Reply-To: <CALHNRZ8vEcq75O_M2A4F6p_Y000SvVgu4pAW5OLtX0ucAGAqFg@mail.gmail.com>

On 3/10/26 10:31 PM, Aaron Kling wrote:
> On Tue, Mar 10, 2026 at 3:20 PM Krzysztof Kozlowski
> <krzysztof.kozlowski@oss.qualcomm.com> wrote:
>>
>> On 10/03/2026 21:05, Aaron Kling wrote:
>>>> ---
>>>> Aaron Kling (2):
>>>>        dt-bindings: interconnect: OSM L3: Document sm8550 OSM L3 compatible
>>>>        arm64: dts: qcom: sm8550: add cpu OPP table with DDR, LLCC & L3 bandwidths
>>>>
>>>>   .../bindings/interconnect/qcom,osm-l3.yaml         |   1 +
>>>>   arch/arm64/boot/dts/qcom/sm8550.dtsi               | 367 +++++++++++++++++++++
>>>>   2 files changed, 368 insertions(+)
>>>> ---
>>>> base-commit: 9845cf73f7db6094c0d8419d6adb848028f4a921
>>>> change-id: 20260207-sm8550-ddr-bw-scaling-b1524827f207
>>>>
>>>> Best regards,
>>>> --
>>>> Aaron Kling <webgeek1234@gmail.com>
>>>
>>> What is the normal merge sequence and window for linux-arm-msm? I see
>>> several things that have been picked up for -next recently, but none
>>> of my sm8550 patches that have been reviewed / approved have been
>>> picked up yet.
>>
>>
>> This one is probably waiting on interconnect, no? Not saying that
>> merging here is easy, quite the opposite - it's frustrating, but you can
>> help by responding with actual data, e.g. bindings were merged and DTS
>> can go, instead of just content-less ping.
> 
> So patch 1, the bindings, has to go via a different tree; then patch 2
> goes via linux-arm-msm? Or does the first patch need an ack from other
> people? I was assuming both of these could be handled by the
> linux-arm-msm maintainers.
> 
> Part of this was a reminder, yes, but the question is still honest. I
> don't know what the expected merge window is here, knowing that is
> good to know if something got lost in the mix. I've got a couple other
> patches as well that are standalone dt changes with no other deps.
> I've had patches to other subsystems that have sat for four or five
> cycles just waiting on the subsystem maintainers.

Hi Aaron,

Last week i picked the 1st patch, so it's in this week's linux-next
releases already. I usually push an immutable branch if there are other
patches that depend on the one i picked, so i did that (icc-sm8550-osm-l3
branch).

Now the Qualcomm maintainers can pick the dts change if they want. My
observations are that the qcom dt tree is closing around -rc5, to give
some time for new patches to get tested before they send a pull request
to the arm-soc maintainers. If some patch is not picked, it's a good
idea to re-base and re-send when the next -rc1 is out.

Thanks,
Georgi


      parent reply	other threads:[~2026-03-11 13:46 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-20  4:07 [PATCH v3 0/2] arm64: qcom: sm8550: add DDR, LLCC & L3 CPU bandwidth scaling Aaron Kling via B4 Relay
2026-02-20  4:07 ` [PATCH v3 1/2] dt-bindings: interconnect: OSM L3: Document sm8550 OSM L3 compatible Aaron Kling via B4 Relay
2026-02-20  4:07 ` [PATCH v3 2/2] arm64: dts: qcom: sm8550: add cpu OPP table with DDR, LLCC & L3 bandwidths Aaron Kling via B4 Relay
2026-02-23  1:16   ` Dmitry Baryshkov
2026-03-30 14:33   ` Bjorn Andersson
2026-03-30 21:52     ` Aaron Kling
2026-03-10 20:05 ` [PATCH v3 0/2] arm64: qcom: sm8550: add DDR, LLCC & L3 CPU bandwidth scaling Aaron Kling
2026-03-10 20:20   ` Krzysztof Kozlowski
2026-03-10 20:31     ` Aaron Kling
2026-03-10 20:48       ` Krzysztof Kozlowski
2026-03-11 13:45       ` Georgi Djakov [this message]

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