Re: [PATCH v9 0/2] gpmc wait pin additions

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 03/11/2022 04:13, Niedermayr, BENEDIKT wrote:
> On Wed, 2022-11-02 at 10:02 -0400, Krzysztof Kozlowski wrote:
>> On 02/11/2022 09:30, B. Niedermayr wrote:
>>> From: Benedikt Niedermayr <benedikt.niedermayr@siemens.com>
>>>
>>> Currently it is not possible to configure the WAIT0PINPOLARITY and
>>> WAIT1PINPOLARITY bits of the GPMC_CONFIG register directly via
>>> device tree properties.
>>>
>>> It is also not possible to use the same wait-pin for different
>>> cs-regions.
>>>
>>> While the current implementation may fullfill most usecases, it may not
>>> be sufficient for more complex setups (e.g. FPGA/ASIC interfaces), where
>>> more complex interfacing options where possible.
>>>
>>> For example interfacing an ASIC which offers multiple cs-regions but
>>> only one waitpin the current driver and dt-bindings are not sufficient.
>>>
>>> While using the same waitpin for different cs-regions worked for older
>>> kernels (4.14) the omap-gpmc.c driver refused to probe (-EBUSY) with
>>> newer kernels (>5.10).
>>
>> This is a friendly reminder during the review process.
>>
>> It looks like you received a tag and forgot to add it.
> 
> Thanks for the hint.
> 
> Was everything OK with v9 (except that I resendet the tagged patch)? Until v8 I wasn't aware of that. I thought I added the tag for v9. 

You did not add the tag you received.

Best regards,
Krzysztof