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[109.252.193.186]) by smtp.googlemail.com with ESMTPSA id t66sm241138lff.85.2020.10.27.13.16.29 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 27 Oct 2020 13:16:30 -0700 (PDT) Subject: Re: [PATCH v6 13/52] dt-bindings: memory: tegra124: emc: Document new interconnect property To: Krzysztof Kozlowski Cc: Thierry Reding , Jonathan Hunter , Georgi Djakov , Rob Herring , Michael Turquette , Stephen Boyd , Peter De Schrijver , MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Mikko Perttunen , Viresh Kumar , Peter Geis , Nicolas Chauvet , linux-tegra@vger.kernel.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org References: <20201025221735.3062-1-digetx@gmail.com> <20201025221735.3062-14-digetx@gmail.com> <20201027102506.GB17089@kozik-lap> <20201027194833.GE140636@kozik-lap> From: Dmitry Osipenko Message-ID: <0a7aeebf-c5ab-13ea-3927-fa39512afd87@gmail.com> Date: Tue, 27 Oct 2020 23:16:29 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <20201027194833.GE140636@kozik-lap> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org 27.10.2020 22:48, Krzysztof Kozlowski пишет: > On Tue, Oct 27, 2020 at 10:19:28PM +0300, Dmitry Osipenko wrote: >> 27.10.2020 13:25, Krzysztof Kozlowski пишет: >>> On Mon, Oct 26, 2020 at 01:16:56AM +0300, Dmitry Osipenko wrote: >>>> External memory controller is interconnected with memory controller and >>>> with external memory. Document new interconnect property which turns >>>> External Memory Controller into interconnect provider. >>>> >>>> Signed-off-by: Dmitry Osipenko >>>> --- >>>> .../bindings/memory-controllers/nvidia,tegra124-emc.yaml | 7 +++++++ >>>> 1 file changed, 7 insertions(+) >>>> >>>> diff --git a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml >>>> index 278549f9e051..ac00832ceac1 100644 >>>> --- a/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml >>>> +++ b/Documentation/devicetree/bindings/memory-controllers/nvidia,tegra124-emc.yaml >>>> @@ -29,6 +29,9 @@ properties: >>>> items: >>>> - const: emc >>>> >>>> + "#interconnect-cells": >>>> + const: 0 >>>> + >>>> nvidia,memory-controller: >>>> $ref: /schemas/types.yaml#/definitions/phandle >>>> description: >>>> @@ -327,6 +330,7 @@ required: >>>> - clocks >>>> - clock-names >>>> - nvidia,memory-controller >>>> + - "#interconnect-cells" >>> >>> Another required property, what about all existing users of this binding? >> >> EMC/devfreq drivers check presence of the new properties and ask users >> to upgrade the DT. The kernel will continue to work fine using older >> DTBs, but devfreq driver won't load. > > If the devfreq was working fine before (with these older DTBs and older > kernel) then you break the feature. > > If devfreq was not working or was not stable enough, then nothing is > broken so such change is accepted. > > Which one is then? Definitely the latter. The current devfreq works okay'ish, but we rely on hardware to recover from temporal FIFO underflows and it's a user-visible problem which this series addresses.