From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Jishnu Prakash" <quic_jprakash@quicinc.com>,
agross@kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linus.walleij@linaro.org,
Jonathan.Cameron@huawei.com, sboyd@kernel.org,
dmitry.baryshkov@linaro.org, quic_subbaram@quicinc.com,
quic_collinsd@quicinc.com, quic_kamalw@quicinc.com,
quic_jestar@quicinc.com, marijn.suijten@somainline.org,
andriy.shevchenko@linux.intel.com,
"Jonathan Cameron" <jic23@kernel.org>,
"Lars-Peter Clausen" <lars@metafoo.de>,
"Bjorn Andersson" <andersson@kernel.org>,
"Konrad Dybcio" <konrad.dybcio@linaro.org>,
"Arnd Bergmann" <arnd@arndb.de>,
"Cosmin Tanislav" <demonsingur@gmail.com>,
"Mike Looijmans" <mike.looijmans@topic.nl>,
"Ramona Bolboaca" <ramona.bolboaca@analog.com>,
"ChiYuan Huang" <cy_huang@richtek.com>,
"Ibrahim Tilki" <Ibrahim.Tilki@analog.com>,
"William Breathitt Gray" <william.gray@linaro.org>,
"Lee Jones" <lee@kernel.org>,
"Leonard Göhrs" <l.goehrs@pengutronix.de>,
"Haibo Chen" <haibo.chen@nxp.com>,
linux-iio@vger.kernel.org, linux-arm-msm@vger.kernel.org
Cc: linux-arm-msm-owner@vger.kernel.org
Subject: Re: [PATCH 07/11] iio: adc: Add support for QCOM PMIC5 Gen3 ADC
Date: Sun, 9 Jul 2023 19:41:25 +0200 [thread overview]
Message-ID: <0b5771b3-31b1-c17c-2be4-9b71538078bb@linaro.org> (raw)
In-Reply-To: <20230708072835.3035398-8-quic_jprakash@quicinc.com>
On 08/07/2023 09:28, Jishnu Prakash wrote:
> The ADC architecture on PMIC5 Gen3 is similar to that on PMIC5 Gen2,
> with all SW communication to ADC going through PMK8550 which
> communicates with other PMICs through PBS. One major difference is
> that the register interface used here is that of an SDAM present on
...
> +static int adc5_gen3_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct iio_dev *indio_dev;
> + struct adc5_chip *adc;
> + struct regmap *regmap;
> + int ret, i, irq;
> + u32 *reg;
> + char buf[20];
> +
> + regmap = dev_get_regmap(dev->parent, NULL);
> + if (!regmap)
> + return -ENODEV;
> +
> + indio_dev = devm_iio_device_alloc(dev, sizeof(*adc));
> + if (!indio_dev)
> + return -ENOMEM;
> +
> + adc = iio_priv(indio_dev);
> + adc->regmap = regmap;
> + adc->dev = dev;
> +
> + ret = device_property_count_u32(dev, "reg");
> + if (ret < 0)
> + return ret;
> +
> + adc->num_sdams = ret;
> +
> + reg = devm_kcalloc(dev, adc->num_sdams, sizeof(u32), GFP_KERNEL);
> + if (!reg)
> + return -ENOMEM;
> +
> + ret = device_property_read_u32_array(dev, "reg", reg, adc->num_sdams);
> + if (ret) {
> + dev_err(adc->dev, "Failed to read reg property, ret=%d\n", ret);
> + return ret;
> + }
> +
> + adc->base = devm_kcalloc(adc->dev, adc->num_sdams, sizeof(*adc->base), GFP_KERNEL);
> + if (!adc->base)
> + return -ENOMEM;
> +
> + for (i = 0; i < adc->num_sdams; i++) {
> + adc->base[i].base_addr = reg[i];
> +
> + irq = platform_get_irq(pdev, i);
> + if (irq < 0) {
> + dev_err(adc->dev, "Failed to get SDAM%d irq, ret=%d\n", i, irq);
> + return irq;
return dev_err_probe
> + }
> + adc->base[i].irq = irq;
> +
> + scnprintf(buf, sizeof(buf), "adc-sdam%d", i);
> + adc->base[i].irq_name = devm_kstrdup(adc->dev, buf, GFP_KERNEL);
> + if (!adc->base[i].irq_name)
> + return -ENOMEM;
> + }
> +
> + platform_set_drvdata(pdev, adc);
> +
> + init_completion(&adc->complete);
> + mutex_init(&adc->lock);
> +
> + ret = adc5_get_fw_data(adc);
> + if (ret < 0) {
> + dev_err(adc->dev, "adc get dt data failed, ret=%d\n", ret);
return dev_err_probe
> + return ret;
> + }
> +
> + for (i = 0; i < adc->num_sdams; i++) {
> + ret = devm_request_irq(dev, adc->base[i].irq, adc5_gen3_isr,
> + 0, adc->base[i].irq_name, adc);
> + if (ret < 0) {
> + dev_err(adc->dev, "Getting IRQ %d failed, ret=%d\n", adc->base[i].irq, ret);
return dev_err_probe
> + return ret;
> + }
> + }
> +
> + ret = adc_tm_register_tzd(adc);
> + if (ret < 0)
> + return ret;
> +
> + if (adc->n_tm_channels)
> + INIT_WORK(&adc->tm_handler_work, tm_handler_work);
> +
> + indio_dev->name = pdev->name;
> + indio_dev->modes = INDIO_DIRECT_MODE;
> + indio_dev->info = &adc5_gen3_info;
> + indio_dev->channels = adc->iio_chans;
> + indio_dev->num_channels = adc->nchannels;
> +
> + return devm_iio_device_register(dev, indio_dev);
> +}
> +
> +static int adc5_gen3_exit(struct platform_device *pdev)
> +{
> + struct adc5_chip *adc = platform_get_drvdata(pdev);
> + u8 data = 0;
> + int i, sdam_index;
> +
> + mutex_lock(&adc->lock);
> + /* Disable all available channels */
> + for (i = 0; i < adc->num_sdams * 8; i++) {
> + sdam_index = i / 8;
> + data = MEAS_INT_DISABLE;
> + adc5_gen3_write(adc, sdam_index, ADC5_GEN3_TIMER_SEL, &data, 1);
> +
> + /* To indicate there is an actual conversion request */
> + data = ADC5_GEN3_CHAN_CONV_REQ | (i - (sdam_index * 8));
> + adc5_gen3_write(adc, sdam_index, ADC5_GEN3_PERPH_CH, &data, 1);
> +
> + data = ADC5_GEN3_CONV_REQ_REQ;
> + adc5_gen3_write(adc, sdam_index, ADC5_GEN3_CONV_REQ, &data, 1);
> + }
> +
> + mutex_unlock(&adc->lock);
> +
> + if (adc->n_tm_channels)
> + cancel_work_sync(&adc->tm_handler_work);
> +
> + return 0;
> +}
> +
> +static struct platform_driver adc5_gen3_driver = {
> + .driver = {
> + .name = "qcom-spmi-adc5-gen3",
> + .of_match_table = adc5_match_table,
> + },
> + .probe = adc5_gen3_probe,
> + .remove = adc5_gen3_exit,
> +};
> +module_platform_driver(adc5_gen3_driver);
> +
> +MODULE_ALIAS("platform:qcom-spmi-adc5-gen3");
Drop alias. If you need it, it means you screwed ID tables or your DTS.
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-07-09 17:41 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-08 7:28 [PATCH 00/11] iio: adc: Add support for QCOM SPMI PMIC5 Gen3 ADC Jishnu Prakash
2023-07-08 7:28 ` [PATCH 01/11] iio: adc: Update bindings for ADC7 name used on QCOM PMICs Jishnu Prakash
2023-07-08 14:58 ` Jonathan Cameron
2023-10-23 6:05 ` Jishnu Prakash
2023-10-23 9:56 ` Jonathan Cameron
2023-07-09 17:17 ` Krzysztof Kozlowski
2023-10-23 6:08 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 02/11] iio: adc: Update driver files for ADC7 rename for " Jishnu Prakash
2023-07-08 7:28 ` [PATCH 03/11] ARM: dts: qcom: Update devicetree " Jishnu Prakash
2023-07-09 17:18 ` Krzysztof Kozlowski
2023-10-23 6:09 ` Jishnu Prakash
2023-10-23 6:32 ` Krzysztof Kozlowski
2023-11-09 8:22 ` Jishnu Prakash
2023-11-10 10:59 ` Krzysztof Kozlowski
2023-11-16 3:23 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 04/11] iio: adc: Update bindings to remove support for ADC7 name used on " Jishnu Prakash
2023-07-08 15:02 ` Jonathan Cameron
2023-10-23 6:10 ` Jishnu Prakash
2023-07-09 17:19 ` Krzysztof Kozlowski
2023-10-23 6:11 ` Jishnu Prakash
2023-10-23 6:33 ` Krzysztof Kozlowski
2023-07-08 7:28 ` [PATCH 05/11] iio: adc: qcom-spmi-adc5: remove support for ADC7 compatible string Jishnu Prakash
2023-07-08 15:00 ` Jonathan Cameron
2023-10-23 6:11 ` Jishnu Prakash
2023-07-09 17:38 ` Krzysztof Kozlowski
2023-10-23 6:12 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 06/11] iio: adc: Add QCOM PMIC5 Gen3 ADC bindings Jishnu Prakash
2023-07-08 15:12 ` Jonathan Cameron
2023-07-08 15:25 ` Jonathan Cameron
2023-10-23 6:13 ` Jishnu Prakash
2023-10-23 6:13 ` Jishnu Prakash
2023-07-09 17:23 ` Krzysztof Kozlowski
2023-10-23 6:14 ` Jishnu Prakash
2023-10-23 6:36 ` Krzysztof Kozlowski
2023-11-16 3:23 ` Jishnu Prakash
2023-11-16 11:40 ` Krzysztof Kozlowski
2023-11-16 11:46 ` Krzysztof Kozlowski
2023-12-21 8:01 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 07/11] iio: adc: Add support for QCOM PMIC5 Gen3 ADC Jishnu Prakash
2023-07-08 15:59 ` Jonathan Cameron
2023-10-23 6:15 ` Jishnu Prakash
2023-10-23 8:03 ` Dmitry Baryshkov
2023-11-16 3:24 ` Jishnu Prakash
2023-10-27 13:26 ` Jonathan Cameron
2023-07-09 17:41 ` Krzysztof Kozlowski [this message]
2023-10-23 6:15 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 08/11] dt-bindings: iio: adc: Copy QCOM ADC bindings files Jishnu Prakash
2023-07-09 17:25 ` Krzysztof Kozlowski
2023-10-23 6:16 ` Jishnu Prakash
2023-10-23 6:19 ` Krzysztof Kozlowski
2023-07-08 7:28 ` [PATCH 09/11] iio: adc: Update QCOM ADC drivers for bindings path change Jishnu Prakash
2023-07-08 15:23 ` Jonathan Cameron
2023-10-23 6:17 ` Jishnu Prakash
2023-10-23 7:58 ` Dmitry Baryshkov
2023-11-16 3:24 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 10/11] ARM: dts: qcom: Update devicetree for QCOM ADC " Jishnu Prakash
2023-07-09 17:26 ` Krzysztof Kozlowski
2023-10-23 6:18 ` Jishnu Prakash
2023-10-23 6:38 ` Krzysztof Kozlowski
2023-11-10 23:47 ` Bjorn Andersson
2023-11-16 3:25 ` Jishnu Prakash
2023-07-09 17:26 ` Krzysztof Kozlowski
2023-10-23 6:18 ` Jishnu Prakash
2023-07-08 7:28 ` [PATCH 11/11] dt-bindings: iio: remove QCOM ADC files from iio folder Jishnu Prakash
2023-07-09 17:28 ` Krzysztof Kozlowski
2023-10-23 6:19 ` Jishnu Prakash
2023-10-23 6:40 ` Krzysztof Kozlowski
2023-07-08 15:13 ` [PATCH 00/11] iio: adc: Add support for QCOM SPMI PMIC5 Gen3 ADC Jonathan Cameron
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