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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Frank Li <Frank.Li@nxp.com>,
	vkoul@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, dmaengine@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	peng.fan@nxp.com, joy.zou@nxp.com, shenwei.wang@nxp.com,
	imx@lists.linux.dev
Subject: Re: [PATCH v6 12/12] dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string
Date: Thu, 15 Jun 2023 12:52:18 +0200	[thread overview]
Message-ID: <0cddd5e8-3de1-1b6a-b4b8-6304e4c674cf@linaro.org> (raw)
In-Reply-To: <20230614193544.2114603-13-Frank.Li@nxp.com>

On 14/06/2023 21:35, Frank Li wrote:
> Extend Freescale eDMA driver bindings to support eDMA3 IP blocks in
> i.MX8QM and i.MX8QXP SoCs. In i.MX93, both eDMA3 and eDMA4 are now.
> 
> Signed-off-by: Frank Li <Frank.Li@nxp.com>
> ---
>  .../devicetree/bindings/dma/fsl,edma.yaml     | 99 +++++++++++++++++--
>  1 file changed, 92 insertions(+), 7 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/fsl,edma.yaml b/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> index 5fd8fc604261..de8c44bd8a89 100644
> --- a/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> +++ b/Documentation/devicetree/bindings/dma/fsl,edma.yaml
> @@ -21,32 +21,41 @@ properties:
>        - enum:
>            - fsl,vf610-edma
>            - fsl,imx7ulp-edma
> +          - fsl,imx8qm-adma
> +          - fsl,imx8qm-edma
> +          - fsl,imx93-edma3
> +          - fsl,imx93-edma4
>        - items:
>            - const: fsl,ls1028a-edma
>            - const: fsl,vf610-edma
>  
>    reg:
> -    minItems: 2
> +    minItems: 1
>      maxItems: 3
>  
>    interrupts:
> -    minItems: 2
> -    maxItems: 17
> +    minItems: 1
> +    maxItems: 64
>  
>    interrupt-names:
> -    minItems: 2
> -    maxItems: 17
> +    minItems: 1
> +    maxItems: 64
>  
>    "#dma-cells":
> -    const: 2
> +    enum:
> +      - 2
> +      - 3
>  
>    dma-channels:
> -    const: 32
> +    minItems: 1
> +    maxItems: 64
>  
>    clocks:
> +    minItems: 1
>      maxItems: 2
>  
>    clock-names:
> +    minItems: 1
>      maxItems: 2
>  
>    big-endian:
> @@ -65,6 +74,38 @@ required:
>  
>  allOf:
>    - $ref: dma-controller.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - fsl,imx8qm-adma
> +              - fsl,imx8qm-edma
> +              - fsl,imx93-edma3
> +              - fsl,imx93-edma4
> +    then:
> +      properties:
> +        "#dma-cells":
> +          const: 3
> +        # It is not necessary to write the interrupt name for each channel.
> +        # instead, you can simply maintain the sequential IRQ numbers as
> +        # defined for the DMA channels.
> +        interrupt-names: false
> +        clock-names:

items:
  - const: dma

clocks:
  maxItems: 1

You do not allow more than one clock, right?

> +          const: dma
> +    else:

You already have two ifs, so you should not have else here, but rather
make each if clause proper for your setup.

BTW, the amount of differences point to very complicated schema, so you
should think whether it makes sense to keep binding growing in the first
place.

> +      properties:
> +        reg:
> +          minItems: 2
> +          maxItems: 3
> +        interrupts:
> +          minItems: 2
> +          maxItems: 17

missing clocks restriction to minItems: 2


> +        "#dma-cells":
> +          const: 2
> +        dma-channels:
> +          const: 32
> +



Best regards,
Krzysztof


  reply	other threads:[~2023-06-15 10:52 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-14 19:35 [PATCH v6 00/12] dmaengine: edma: add freescale edma v3 support Frank Li
2023-06-14 19:35 ` [PATCH v6 01/12] dmaengine: fsl-edma: clean up EXPORT_SYMBOL_GPL in fsl-edma-common.c Frank Li
2023-06-14 19:35 ` [PATCH v6 02/12] dmaengine: fsl-edma: clean up fsl_edma_irq_exit() Frank Li
2023-06-14 19:35 ` [PATCH v6 03/12] dmaengine: fsl-edma: transition from bool fields to bitmask flags in drvdata Frank Li
2023-06-14 19:35 ` [PATCH v6 04/12] dmaengine: fsl-edma: Remove enum edma_version Frank Li
2023-06-14 19:35 ` [PATCH v6 05/12] dmaengine: fsl-edma: move common IRQ handler to common.c Frank Li
2023-06-14 19:35 ` [PATCH v6 06/12] dmaengine: fsl-edma: simply ATTR_DSIZE and ATTR_SSIZE by using ffs() Frank Li
2023-06-14 19:35 ` [PATCH v6 07/12] dmaengine: fsl-edma: refactor using devm_clk_get_enabled Frank Li
2023-06-14 19:35 ` [PATCH v6 08/12] dmaengine: fsl-edma: move clearing of register interrupt into setup_irq function Frank Li
2023-06-14 19:35 ` [PATCH v6 09/12] dmaengine: fsl-edma: refactor chan_name setup and safety Frank Li
2023-06-14 19:35 ` [PATCH v6 10/12] dmaengine: fsl-edma: move tcd into struct fsl_dma_chan Frank Li
2023-06-14 19:35 ` [PATCH v6 11/12] dmaengine: fsl-edma: integrate v3 support Frank Li
2023-06-14 19:35 ` [PATCH v6 12/12] dt-bindings: fsl-dma: fsl-edma: add edma3 compatible string Frank Li
2023-06-15 10:52   ` Krzysztof Kozlowski [this message]
2023-06-15 14:37     ` Frank Li

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