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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id m12-20020ac24acc000000b004a240eb0217sm1980833lfp.251.2022.11.21.02.19.33 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 21 Nov 2022 02:19:33 -0800 (PST) Message-ID: <0dc15e61-62a3-fa23-1fa9-09179d90874b@linaro.org> Date: Mon, 21 Nov 2022 11:19:32 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH 1/2] dt-bindings: timer: add a binding for LiteX Timer Content-Language: en-US To: Icenowy Zheng , Daniel Lezcano , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Karol Gugala , Mateusz Holenko , Gabriel Somlo , Joel Stanley Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org References: <20221121042545.421532-1-uwu@icenowy.me> From: Krzysztof Kozlowski In-Reply-To: <20221121042545.421532-1-uwu@icenowy.me> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 21/11/2022 05:25, Icenowy Zheng wrote: > The LiteX SoC generator has a timer core, which by default only > generates a simple down counter. Subject: drop second, redundant "bindings". > > Add a DT binding for it. > > Signed-off-by: Icenowy Zheng > --- > .../bindings/timer/litex,timer.yaml | 52 +++++++++++++++++++ > 1 file changed, 52 insertions(+) > create mode 100644 Documentation/devicetree/bindings/timer/litex,timer.yaml > > diff --git a/Documentation/devicetree/bindings/timer/litex,timer.yaml b/Documentation/devicetree/bindings/timer/litex,timer.yaml > new file mode 100644 > index 000000000000..bece07586c6b > --- /dev/null > +++ b/Documentation/devicetree/bindings/timer/litex,timer.yaml > @@ -0,0 +1,52 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/timer/litex,timer.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: LiteX Timer > + > +maintainers: > + - Icenowy Zheng > + > +description: | > + The LiteX Timer is a count-down timer that is defaultly embedded > + into all LiteX SoCs, unless explicitly disabled. It's fed directly > + by the system clock like other LiteX peripherals. > + > +properties: > + compatible: > + const: litex,timer No model name/number? If it is part of Soc, then a SoC specific number is expected usually. > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > + litex,width: > + description: > + The width of the timer's value, specified as the width argument > + when creating an instance of litex.soc.cores.Timer. This lacks type ($ref) and units in description, but more important - why this is not part of compatible? Is it a width of register(s)? And what is "instance of litex.soc.cores.Timer"? Is it configurable, soft-core? BTW, there is reg-io-width property. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - litex,width > + > +additionalProperties: false > + > +examples: > + - | > + timer@a0006000 { Use 4 spaces for example indentation. > + compatible = "litex,timer"; > + reg = <0xa0006000 0x20>; > + clocks = <&sys_clk>; > + interrupts = <17>; > + litex,width = <32>; > + }; Best regards, Krzysztof