Re: [PATCH 02/15] ARM: tegra: apalis-tk1: reorder pcie properties

[Stefan Agner <stefan@agner.ch>]

On 24.07.2018 12:42, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> 
> Reorder PCIe properties.

Hm, first vs. last property, as far as I can tell there is no official
recommendation. Maybe Rob can comment on that?

Most device trees put status last, also the base device trees
tegra30.dtsi/tegra124.dtsi. So I think in this case we should go with
last property (before subnodes).

--
Stefan

> 
> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> 
> ---
> 
>  arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi | 2 +-
>  arch/arm/boot/dts/tegra124-apalis.dtsi      | 2 +-
>  2 files changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> index 09e3641258ae..cb7e53c86408 100644
> --- a/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2.dtsi
> @@ -39,9 +39,9 @@
>  
>  		/* I210 Gigabit Ethernet Controller (On-module) */
>  		pci@2,0 {
> +			status = "okay";
>  			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
>  			phy-names = "pcie-0";
> -			status = "okay";
>  
>  			pcie@0 {
>  				reg = <0 0 0 0 0>;
> diff --git a/arch/arm/boot/dts/tegra124-apalis.dtsi
> b/arch/arm/boot/dts/tegra124-apalis.dtsi
> index 5e7ae5e92fb8..d73ee974648a 100644
> --- a/arch/arm/boot/dts/tegra124-apalis.dtsi
> +++ b/arch/arm/boot/dts/tegra124-apalis.dtsi
> @@ -74,9 +74,9 @@
>  
>  		/* I210 Gigabit Ethernet Controller (On-module) */
>  		pci@2,0 {
> +			status = "okay";
>  			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
>  			phy-names = "pcie-0";
> -			status = "okay";
>  
>  			pcie@0 {
>  				reg = <0 0 0 0 0>;