From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Mrinmay Sarkar <quic_msarkar@quicinc.com>,
agross@kernel.org, andersson@kernel.org,
krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
konrad.dybcio@linaro.org, mani@kernel.org
Cc: quic_shazhuss@quicinc.com, quic_nitegupt@quicinc.com,
quic_ramkri@quicinc.com, quic_nayiluri@quicinc.com,
dmitry.baryshkov@linaro.org, robh@kernel.org,
quic_krichai@quicinc.com, quic_vbadigan@quicinc.com,
quic_parass@quicinc.com,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Kishon Vijay Abraham I" <kishon@kernel.org>,
"Vinod Koul" <vkoul@kernel.org>,
linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
mhi@lists.linux.dev, linux-phy@lists.infradead.org
Subject: Re: [PATCH v2 3/4] PCI: epf-mhi: Add support for SA8775P
Date: Thu, 19 Oct 2023 14:45:41 +0200 [thread overview]
Message-ID: <0de848a8-a658-4c5b-928b-5e948a22f291@linaro.org> (raw)
In-Reply-To: <1697023109-23671-4-git-send-email-quic_msarkar@quicinc.com>
On 11/10/2023 13:18, Mrinmay Sarkar wrote:
> Add support for Qualcomm Snapdragon SA8775P SoC to the EPF driver.
> SA8775P has the PID (0x0306) and supports HDMA. Currently, it has
> no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS".
>
> Signed-off-by: Mrinmay Sarkar <quic_msarkar@quicinc.com>
> ---
> drivers/pci/endpoint/functions/pci-epf-mhi.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> index b7b9d3e..f05c2e4 100644
> --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c
> +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c
> @@ -114,6 +114,22 @@ static const struct pci_epf_mhi_ep_info sm8450_info = {
> .flags = MHI_EPF_USE_DMA,
> };
>
> +static const struct pci_epf_header sa8775p_header = {
> + .vendorid = PCI_VENDOR_ID_QCOM,
> + .deviceid = 0x0306,
> + .baseclass_code = PCI_CLASS_OTHERS,
> + .interrupt_pin = PCI_INTERRUPT_INTA,
> +};
> +
> +static const struct pci_epf_mhi_ep_info sa8775p_info = {
> + .config = &mhi_v1_config,
> + .epf_header = &sa8775p_header,
> + .bar_num = BAR_0,
> + .epf_flags = PCI_BASE_ADDRESS_MEM_TYPE_32,
> + .msi_count = 32,
> + .mru = 0x8000,
This is almost the same (minus MHI_EPF_USE_DMA) as sm8450. Are you sure
these are not compatible?
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-10-19 12:45 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-11 11:18 [PATCH v2 0/4] arm64: qcom: sa8775p: add support for EP PCIe Mrinmay Sarkar
2023-10-11 11:18 ` [PATCH v2 1/4] dt-bindings: PCI: qcom-ep: Add support for SA8775P SoC Mrinmay Sarkar
2023-10-11 18:30 ` Krzysztof Kozlowski
2023-10-11 11:18 ` [PATCH v2 2/4] phy: qcom-qmp-pcie: add endpoint support for sa8775p Mrinmay Sarkar
2023-10-11 11:36 ` Dmitry Baryshkov
2023-10-11 11:55 ` Mrinmay Sarkar
2023-10-11 12:00 ` Dmitry Baryshkov
2023-10-11 11:18 ` [PATCH v2 3/4] PCI: epf-mhi: Add support for SA8775P Mrinmay Sarkar
2023-10-11 13:42 ` kernel test robot
2023-10-19 12:45 ` Krzysztof Kozlowski [this message]
2023-10-11 11:18 ` [PATCH v2 4/4] arm64: dts: qcom: sa8775p: Add ep pcie0 controller node Mrinmay Sarkar
2023-10-16 18:30 ` Bjorn Andersson
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