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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id jz1-20020a17090775e100b006f3ef214e27sm4814174ejc.141.2022.05.03.08.57.53 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 May 2022 08:57:54 -0700 (PDT) Message-ID: <0df2fd83-951c-d253-6494-3b70f5762aae@linaro.org> Date: Tue, 3 May 2022 17:57:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [RFC v2 2/2] arm: hisi: enable Hi3521a soc Content-Language: en-US To: "Marty E. Plummer" Cc: arnd@arndb.de, cai.huoqing@linux.dev, christian.koenig@amd.com, devicetree@vger.kernel.org, gengdongjiu@huawei.com, krzysztof.kozlowski+dt@linaro.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org, linux@armlinux.org.uk, michael@walle.cc, miquel.raynal@bootlin.com, mturquette@baylibre.com, novikov@ispras.ru, olof@lixom.net, p.yadav@ti.com, rdunlap@infradead.org, richard@nod.at, robh+dt@kernel.org, sboyd@kernel.org, soc@kernel.org, sumit.semwal@linaro.org, tudor.ambarus@microchip.com, vigneshr@ti.com, xuwei5@hisilicon.com References: <20220501054440.2434247-1-hanetzer@startmail.com> <20220501173423.2473093-1-hanetzer@startmail.com> <20220501173423.2473093-3-hanetzer@startmail.com> <4cda3645-c4e8-1b3c-bd80-891afd56449a@linaro.org> <20220503134459.pplgvhcckja4ivcg@proprietary-killer> <75a48dfa-6fc9-aed9-b00e-d928bd9f33af@linaro.org> <20220503155141.ekbysx6fjom5el2h@proprietary-killer> From: Krzysztof Kozlowski In-Reply-To: <20220503155141.ekbysx6fjom5el2h@proprietary-killer> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 03/05/2022 17:51, Marty E. Plummer wrote: >>>> A bit weird interrupts... the same? >>>> >>> Yes, though I am aware that some sp804 timers do have a separate >>> interrupts per pair. >> >> They have also separate interrupts, one combined interrupt or one sole >> interrupt. However what you described here is one interrupt line >> physically connected to two separate pins on the device yet still not >> being somehow shared (shared as "combined interrupt"). I don't think it >> is your case... >> > Unsure. datasheet just says '33 | Timer0/Timer1'. I don't think these > timers are attached to pins, however. So it looks like a combined interrupt, doesn't it? Best regards, Krzysztof