From: Marek Vasut <marek.vasut@gmail.com>
To: Ludovic BARRE <ludovic.barre@st.com>,
Cyrille Pitchen <cyrille.pitchen@atmel.com>
Cc: David Woodhouse <dwmw2@infradead.org>,
Brian Norris <computersforpeace@gmail.com>,
Boris Brezillon <boris.brezillon@free-electrons.com>,
Richard Weinberger <richard@nod.at>,
Alexandre Torgue <alexandre.torgue@st.com>,
Rob Herring <robh+dt@kernel.org>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org
Subject: Re: [PATCH 2/2] mtd: spi-nor: add driver for STM32 quad spi flash controller
Date: Wed, 29 Mar 2017 15:57:38 +0200 [thread overview]
Message-ID: <0e7da44f-c41b-de15-62c3-7509e556f623@gmail.com> (raw)
In-Reply-To: <2410fcde-1d1d-57b5-01ee-bd6bc3bc863b@st.com>
On 03/29/2017 03:35 PM, Ludovic BARRE wrote:
[...]
>>>>> + writel_relaxed(CR_PRESC(presc) | CR_FTHRES(3) | CR_TCEN |
>>>>> CR_SSHIFT
>>>>> + | CR_EN, qspi->io_base + QUADSPI_CR);
>>>>> +
>>>>> + /* a minimum fsize must be set to sent the command id */
>>>>> + flash->fsize = 25;
>>>> I don't understand why this is needed and the comment doesn't make
>>>> sense. Please fix.
>>> fsize field defines the size of external memory.
>> What external memory ? Unclear
> oops, fsize field defined the size of "flash memory" in stm32 qspi
> controller.
Errr, now I am totally lost :) Is that some internal SPI NOR ? Shouldn't
the size be coming from DT or something ?
> Number of bytes in Flash memory = 2 ^[FSIZE+1].
> To sent a nor cmd this field must be set (hardware issue),
> but before "spi_nor_scan" the size of flash nor is not know.
> So I set a temporary value (workaround).
Is it needed before the scan ?
> After "spi_nor_scan" the fsize is overwritten by the right value
> flash->fsize = __fls(mtd->size) - 1;
>>> Normaly, this field is used only for memory map mode,
>>> but in fact is check in indirect mode.
>>> So while flash scan "spi_nor_scan":
>>> -I can't let 0.
>>> -I not know yet the size of flash.
>>> So I fix a temporary value
>>>
>>> I will update my comment
>> Please do, also please consider that I'm reading the comment and I
>> barely have any clue about this hardware , so make sure I can
>> understand it.
>>
>>>>> + ret = spi_nor_scan(&flash->nor, NULL, flash_read);
>>>>> + if (ret) {
>>>>> + dev_err(qspi->dev, "device scan failed\n");
>>>>> + return ret;
>>>>> + }
>>>>> +
>>>>> + flash->fsize = __fls(mtd->size) - 1;
>>>>> +
>>>>> + writel_relaxed(DCR_CSHT(1), qspi->io_base + QUADSPI_DCR);
>>>>> +
>>>>> + ret = mtd_device_register(mtd, NULL, 0);
>>>>> + if (ret) {
>>>>> + dev_err(qspi->dev, "mtd device parse failed\n");
>>>>> + return ret;
>>>>> + }
>>>>> +
>>>>> + dev_dbg(qspi->dev, "read mm:%s cs:%d bus:%d\n",
>>>>> + qspi->read_mode == CCR_FMODE_MM ? "yes" : "no", cs_num,
>>>>> width);
>>>>> +
>>>>> + return 0;
>>>>> +}
>>>> [...]
>>>>
>>
>
--
Best regards,
Marek Vasut
next prev parent reply other threads:[~2017-03-29 13:57 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-27 12:54 [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Ludovic Barre
2017-03-27 12:54 ` [PATCH 2/2] mtd: spi-nor: add driver for STM32 quad spi flash controller Ludovic Barre
[not found] ` <1490619296-8168-3-git-send-email-ludovic.Barre-qxv4g6HH51o@public.gmane.org>
2017-03-29 10:54 ` Marek Vasut
[not found] ` <1be39452-83b0-5c32-39fe-d6dd5134d1ef-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-29 12:24 ` Ludovic BARRE
[not found] ` <2c364b99-512c-8eb6-7044-7989ba21d53b-qxv4g6HH51o@public.gmane.org>
2017-03-29 13:09 ` Marek Vasut
[not found] ` <28454969-0f56-7752-b087-5e02a1a20c23-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-29 13:35 ` Ludovic BARRE
2017-03-29 13:57 ` Marek Vasut [this message]
[not found] ` <0e7da44f-c41b-de15-62c3-7509e556f623-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-03-29 16:38 ` Ludovic BARRE
2017-03-30 10:17 ` Marek Vasut
[not found] ` <1490619296-8168-1-git-send-email-ludovic.Barre-qxv4g6HH51o@public.gmane.org>
2017-03-27 12:54 ` [PATCH 1/2] dt-bindings: Document the STM32 QSPI bindings Ludovic Barre
2017-03-29 16:51 ` [PATCH 0/2] mtd: spi-nor: add stm32 qspi driver Cyrille Pitchen
[not found] ` <5224f3cd-a128-9e72-c0c8-62a137ceeb79-yU5RGvR974pGWvitb5QawA@public.gmane.org>
2017-03-30 7:31 ` Ludovic BARRE
[not found] ` <d1c2f0a9-302d-ea7c-5d1b-ad32b9950ed4-qxv4g6HH51o@public.gmane.org>
2017-03-30 10:15 ` Marek Vasut
2017-04-05 16:20 ` Ludovic BARRE
2017-04-06 20:07 ` Cyrille Pitchen
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