Re: [PATCH 2/7] ARM: dts: nuvoton: Add Quanta GSZ BMC Device Tree

[Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>]

On 03/03/2023 07:34, David Wang wrote:
> Add the device tree for the Quanta GSZ BMC and it's
> based on NPCM730 SoC
> 
> Signed-off-by: David Wang <davidwang@quantatw.com>


> +};
> diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gsz.dts b/arch/arm/boot/dts/nuvoton-npcm730-gsz.dts
> new file mode 100644
> index 000000000000..c9f11880ef6d
> --- /dev/null
> +++ b/arch/arm/boot/dts/nuvoton-npcm730-gsz.dts
> @@ -0,0 +1,1523 @@
> +// SPDX-License-Identifier: GPL-2.0
> +//
> +// Copyright (c) 2021 Quanta Computer Inc. Fran.Hsu@quantatw.com
> +
> +/dts-v1/;
> +#include "nuvoton-npcm730.dtsi"
> +#include "nuvoton-npcm730-gsz-gpio.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/i2c/i2c.h>
> +
> +/ {
> +	model = "Quanta GSZ Board (Device Tree v01.10)";
> +	compatible = "nuvoton,npcm750";

Same problems.

> +
> +	aliases {
> +		serial0 = &serial0;
> +		serial1 = &serial1;
> +		serial2 = &serial2;
> +		serial3 = &serial3;
> +		udc5 = &udc5;
> +		udc6 = &udc6;
> +		udc7 = &udc7;
> +		udc8 = &udc8;
> +		emmc0 = &sdhci0;
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &i2c5;
> +		i2c6 = &i2c6;
> +		i2c7 = &i2c7;
> +		i2c8 = &i2c8;
> +		i2c9 = &i2c9;
> +		i2c10 = &i2c10;
> +		i2c11 = &i2c11;
> +		i2c12 = &i2c12;
> +		i2c13 = &i2c13;
> +		i2c14 = &i2c14;
> +		fiu0 = &fiu0;
> +		fiu1 = &fiu3;
> +		i2c16 = &i2c_9SQ440NQQI8;
> +		i2c17 = &i2c_db2001;
> +		i2c18 = &i2c_db1200;
> +		i2c19 = &i2c_io_exp_1;
> +		i2c20 = &i2c_cpu0_pirom;
> +		i2c21 = &i2c_cpu1_pirom;
> +		i2c22 = &i2c_ncsi_clk;
> +		i2c23 = &i2c_m2;
> +		i2c24 = &i2c_fivra_cpu0;
> +		i2c25 = &i2c_fivra_cpu1;
> +		i2c26 = &i2c_vccfa_cpu0;
> +		i2c27 = &i2c_vccfa_cpu1;
> +		i2c28 = &i2c_vccd_cpu0;
> +		i2c29 = &i2c_vccd_cpu1;
> +		i2c30 = &i2c_hotswap;
> +		i2c31 = &i2c_tps_1;
> +		i2c32 = &i2c_p12v_1;
> +		i2c33 = &i2c_p12v_2;
> +		i2c34 = &i2c_fan_controller_1;
> +		i2c35 = &i2c_i2cool_1;
> +		i2c36 = &i2c_i2cool_2;
> +		i2c37 = &i2c_i2cool_3;
> +		i2c38 = &i2c_seq_mobo;
> +		i2c39 = &i2c_fru_2;
> +		i2c40 = &i2c_io_exp_2;
> +		i2c41 = &i2c_io_exp_3;
> +		i2c43 = &i2c_fru_3;
> +		i2c44 = &i2c_seq;
> +		i2c45 = &i2c_fru_1;
> +		i2c46 = &i2c_tang;
> +		i2c51 = &i2c_pe0_0;
> +		i2c52 = &i2c_pe0_1;
> +		i2c53 = &i2c_pe0_2;
> +		i2c54 = &i2c_pe1_0;
> +		i2c55 = &i2c_pe1_1;
> +		i2c56 = &i2c_pe1_2;
> +		i2c57 = &i2c_pe2_0;
> +		i2c58 = &i2c_pe2_1;
> +		i2c59 = &i2c_pe2_2;
> +		i2c60 = &i2c_pe3_0;
> +		i2c61 = &i2c_pe3_1;
> +		i2c62 = &i2c_pe3_2;
> +		i2c63 = &i2c_pe4_0;
> +		i2c64 = &i2c_pe4_1;
> +		i2c65 = &i2c_pe4_2;
> +		i2c66 = &i2c_pe5_0;
> +		i2c67 = &i2c_pe5_1;
> +		i2c68 = &i2c_pe5_2;
> +		i2c69 = &i2c_pe6_0;
> +		i2c70 = &i2c_pe6_1;
> +		i2c71 = &i2c_pe6_2;
> +		i2c72 = &i2c_pe7_0;
> +		i2c73 = &i2c_pe7_1;
> +		i2c74 = &i2c_pe7_2;
> +	};
> +
> +	chosen {
> +		stdout-path = &serial3;
> +	};
> +
> +	memory {
> +		reg = <0 0x40000000>;
> +	};
> +
> +	gpio-keys {
> +		compatible = "gpio-keys";
> +		efuse-pg {

and all my other comments also apply...



Best regards,
Krzysztof