Re: [PATCH 2/2] ARM: dts: imx6qdl: phycore-som: Add custom volt/freq table

[Primoz Fiser <primoz.fiser@norik.com>]

On 9/23/26 09:45, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] dts: imx6dl: missing fsl,soc-operating-points violates hardware constraint
> --
> 
> commit a3b6d4e5af39862c78043d8917ba381472b78ee4
> Author: Yunus Bas <y.bas@phytec.de>
> 
>     ARM: dts: imx6qdl: phycore-som: Add custom volt/freq table
> 
> The PHYTEC phyCORE-i.MX6QDL SOM-modules are operating with slightly different
> voltage and frequency values. Introduce imx6q- and imx6dl-phycore dtsi files
> with the modified power tables to achieve stable condition.
> 
>> diff --git a/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-phycore-som.dtsi b/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-phycore-som.dtsi
>> new file mode 100644
>> index 0000000000000..de85c084ac8d3
>> --- /dev/null
>> +++ b/arch/arm/boot/dts/nxp/imx/imx6dl-phytec-phycore-som.dtsi
>> @@ -0,0 +1,23 @@
>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
>> +/*
>> + * Copyright (C) 2021 PHYTEC Messtechnik GmbH
>> + * Author: Yunus Bas <y.bas@phytec.de>
>> + */
>> +
>> +#include "imx6qdl-phytec-phycore-som.dtsi"
>> +
>> +&cpu0 {
>> +	operating-points =
>> +		/* kHz    uV */
>> +		<996000 1275000>,
>                 ^^^^^^^^^^^^^^^^
> [Severity: High]
> This overrides the operating-points to increase VDD_ARM to 1.275V for the
> 996MHz tier, but lacks a corresponding fsl,soc-operating-points override.
> 
> Without it, VDD_SOC will inherit the default 1.175V from imx6dl.dtsi.
> 
> The NXP i.MX6 DualLite hardware datasheet specifies that VDD_ARM_IN must not
> exceed VDD_SOC_IN by more than 50mV to prevent latch-up and instability.
> 
> Does this 100mV gap risk system instability or hardware damage by violating
> this constraint? Note that the newly added imx6q-phytec-phycore-som.dtsi
> correctly includes the fsl,soc-operating-points property.

From the i.MX6DL datasheet:

footnote 4:

"In LDO enabled mode, the internal LDO output set points must be
configured such that the VDD_ARM LDO output set point does not exceed
the VDD_SOC LDO output set point by more than 100 mV"

footnote 6:

"In LDO bypassed mode, the external power supply must ensure that
VDD_ARM_IN does not exceed VDD_SOC_IN by more than 100 mV."

The actual limit is thus 100 mV, not 50 mV! Can you provide quote
regarding your 50 mV?

With this override, the only affected tier is the top one (996 MHz):
VDD_ARM = 1.275 V, VDD_SOC (inherited from imx6dl.dtsi's default
fsl,soc-operating-points) = 1.175 V, a gap of exactly 100 mV...

So this is still within limits hence no fsl,soc-operating-points
override is required here IMHO.

Moreover, PHYTEC boards using downstream kernel with this patch applied
have been operating with such settings for years now without issues.

BR,
Primoz


> 
>> +		<792000 1175000>,
>> +		<396000 1150000>;
>> +};
> 

-- 
Primoz Fiser
phone: +386-41-390-545
email: primoz.fiser@norik.com
--
Norik systems d.o.o.
Your embedded software partner
Slovenia, EU
phone: +386-41-540-545
email: info@norik.com