From: Michal Simek <michal.simek@xilinx.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Michal Simek <michal.simek@xilinx.com>
Cc: linux-kernel@vger.kernel.org, monstr@monstr.eu, git@xilinx.com,
Kalyani Akula <kalyani.akula@xilinx.com>,
Krzysztof Kozlowski <krzk@kernel.org>,
Manish Narani <manish.narani@xilinx.com>,
Michael Tretter <m.tretter@pengutronix.de>,
Nava kishore Manne <nava.manne@xilinx.com>,
Rajan Vaja <rajan.vaja@xilinx.com>,
Rob Herring <robh+dt@kernel.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] arm64: dts: zynqmp: Fix pcie ranges description
Date: Fri, 2 Oct 2020 08:30:05 +0200 [thread overview]
Message-ID: <100535b9-d643-f91c-af46-fb8114d7d6ed@xilinx.com> (raw)
In-Reply-To: <20201002020249.GU3722@pendragon.ideasonboard.com>
Hi Laurent,
On 02. 10. 20 4:02, Laurent Pinchart wrote:
> Hi Michal,
>
> Thank you for the patch.
>
> On Tue, Sep 29, 2020 at 01:43:22PM +0200, Michal Simek wrote:
>> DT schema is checking tuples which should be properly separated. The patch
>> is doing this separation to avoid the following warning:
>> ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0,
>> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under
>> any of the given schemas (Possible causes of the failure):
>> ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected
>> ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0,
>> 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long
>
> I would keep the error message unwrapped as it's a bit confusing to
> read, even if it exceeds the normal 72 columns limit of commit messaged.
From git log I see that both ways are used.
>
>> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
>
> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thanks,
Michal
next prev parent reply other threads:[~2020-10-02 6:30 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-29 11:43 [PATCH] arm64: dts: zynqmp: Fix pcie ranges description Michal Simek
2020-10-02 2:02 ` Laurent Pinchart
2020-10-02 6:30 ` Michal Simek [this message]
2020-11-25 12:28 ` Michal Simek
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