[PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[Sergei Shtylyov]

[-- Attachment #1: arm64-dts-renesas-eagle-add-EtherAVB-pins.patch --]
[-- Type: text/plain, Size: 852 bytes --]

Add the (previously omitted) EtherAVB pin data to the Eagle board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

---
 arch/arm64/boot/dts/renesas/r8a77970-eagle.dts |    8 ++++++++
 1 file changed, 8 insertions(+)

Index: renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
===================================================================
--- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
+++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
@@ -34,6 +34,9 @@
 };
 
 &avb {
+	pinctrl-0 = <&avb_pins>;
+	pinctrl-names = "default";
+
 	renesas,no-ether-link;
 	phy-handle = <&phy0>;
 	status = "okay";
@@ -53,6 +56,11 @@
 };
 
 &pfc {
+	avb_pins: avb {
+		groups = "avb0_mdio", "avb0_mii";
+		function = "avb0";
+	};
+
 	scif0_pins: scif0 {
 		groups = "scif0_data";
 		function = "scif0";

Re: [PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[Geert Uytterhoeven]

Hi Sergei,

On Fri, Nov 10, 2017 at 9:02 PM, Sergei Shtylyov
<sergei.shtylyov@cogentembedded.com> wrote:
> Add the (previously omitted) EtherAVB pin data to the Eagle board's
> device tree.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>

Thanks for your patch!

> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
> @@ -34,6 +34,9 @@
>  };
>
>  &avb {
> +       pinctrl-0 = <&avb_pins>;
> +       pinctrl-names = "default";
> +
>         renesas,no-ether-link;
>         phy-handle = <&phy0>;
>         status = "okay";
> @@ -53,6 +56,11 @@
>  };
>
>  &pfc {
> +       avb_pins: avb {
> +               groups = "avb0_mdio", "avb0_mii";

Oh no, its'called "avb0_mdio" here, but "avb(0)_mdc" on all other
R-Car Gen3 SoCs?

What about "avb0_link", which is connected through "L_LNK"?

> +               function = "avb0";
> +       };
> +

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[Sergei Shtylyov]

Hello.

On 11/14/2017 11:44 AM, Geert Uytterhoeven wrote:

>> Add the (previously omitted) EtherAVB pin data to the Eagle board's
>> device tree.
>>
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> 
> Thanks for your patch!
> 
>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>> @@ -34,6 +34,9 @@
[...]
>> @@ -53,6 +56,11 @@
>>   };
>>
>>   &pfc {
>> +       avb_pins: avb {
>> +               groups = "avb0_mdio", "avb0_mii";
> 
> Oh no, its'called "avb0_mdio" here, but "avb(0)_mdc" on all other
> R-Car Gen3 SoCs?

    Can you remember the reason? I don;t want to follow the bad example. :-)

> What about "avb0_link", which is connected through "L_LNK"?

    The same as for other gen3 board, the AVB node has renesas,no-ether-link".
I tried to verify that property on Eagle, and left it intact as a result... 
Will re-test removing it once more.

[...]

> Gr{oetje,eeting}s,
> 
>                          Geert

MBR, Sergei

Re: [PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[Geert Uytterhoeven]

Hi Sergei,

On Tue, Nov 14, 2017 at 7:00 PM, Sergei Shtylyov
<sergei.shtylyov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org> wrote:
> On 11/14/2017 11:44 AM, Geert Uytterhoeven wrote:
>>> Add the (previously omitted) EtherAVB pin data to the Eagle board's
>>> device tree.

>>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>>> @@ -34,6 +34,9 @@
>
> [...]
>>>
>>> @@ -53,6 +56,11 @@
>>>   };
>>>
>>>   &pfc {
>>> +       avb_pins: avb {
>>> +               groups = "avb0_mdio", "avb0_mii";
>>
>>
>> Oh no, its'called "avb0_mdio" here, but "avb(0)_mdc" on all other
>> R-Car Gen3 SoCs?
>
>
>    Can you remember the reason? I don;t want to follow the bad example. :-)

Sorry, I don't know.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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Re: [PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[Sergei Shtylyov]

Hello!

On 11/15/2017 07:21 PM, Geert Uytterhoeven wrote:

>>>> Add the (previously omitted) EtherAVB pin data to the Eagle board's
>>>> device tree.
> 
>>>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>>>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>>>> @@ -34,6 +34,9 @@
>>
>> [...]
>>>>
>>>> @@ -53,6 +56,11 @@
>>>>    };
>>>>
>>>>    &pfc {
>>>> +       avb_pins: avb {
>>>> +               groups = "avb0_mdio", "avb0_mii";
>>>
>>>
>>> Oh no, its'called "avb0_mdio" here, but "avb(0)_mdc" on all other
>>> R-Car Gen3 SoCs?
>>
>>
>>     Can you remember the reason? I don;t want to follow the bad example. :-)
> 
> Sorry, I don't know.

    Hm, you seem to have participated in the related discussions for H2/M3-W...
The reason was that omlu AVB_MDC signal was multiplexed, AVB_MDIO signal (and 
AVB MII signals) was mapped to a dedicated pin without any multiplexing, so 
the "avb_mdc" group initially contained only AVB_MDC.

> Gr{oetje,eeting}s,

MBR, Sergei

Re: [PATCH 3/3] arm64: dts: renesas: eagle: add EtherAVB pins

[Sergei Shtylyov]

On 11/15/2017 11:21 PM, Sergei Shtylyov wrote:

>>>>> Add the (previously omitted) EtherAVB pin data to the Eagle board's
>>>>> device tree.
>>
>>>>> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>>>>> +++ renesas/arch/arm64/boot/dts/renesas/r8a77970-eagle.dts
>>>>> @@ -34,6 +34,9 @@
>>>
>>> [...]
>>>>>
>>>>> @@ -53,6 +56,11 @@
>>>>>    };
>>>>>
>>>>>    &pfc {
>>>>> +       avb_pins: avb {
>>>>> +               groups = "avb0_mdio", "avb0_mii";
>>>>
>>>>
>>>> Oh no, its'called "avb0_mdio" here, but "avb(0)_mdc" on all other
>>>> R-Car Gen3 SoCs?
>>>
>>>
>>>     Can you remember the reason? I don;t want to follow the bad example. :-)
>>
>> Sorry, I don't know.
> 
>     Hm, you seem to have participated in the related discussions for H2/M3-W...

    H3, of course...

> The reason was that omlu AVB_MDC signal was multiplexed, AVB_MDIO signal (and 

    s/omlu/only/.

> AVB MII signals) was mapped to a dedicated pin without any multiplexing, so 
> the "avb_mdc" group initially contained only AVB_MDC.
> 
>> Gr{oetje,eeting}s,

MBR, Sergei
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