Re: Re: [PATCH RESEND v2 06/12] drm/sun4i: rgb: Add 1% tolerance to dclk frequency check when bridge is connected

Maxime Ripard
2019-02-05T15:41:56Z

[-- Attachment #1: Type: text/plain, Size: 819 bytes --]

On Mon, Feb 04, 2019 at 10:50:17AM -0800, Vasily Khoruzhick wrote:
> On Mon, Feb 4, 2019 at 8:29 AM Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org> wrote:
> > >> IIRC, from the previous discussion, HDMI had a tolerancy requirement
> > >> in the standard. Do you know if there's such a thing for eDP? That
> > >> would solve the issue for all the eDP displays at once.
> > >
> > >I don't have access to eDP standard - vesa.org says it's available to
> > >members only.
> >
> > Try out to grab an old version?
> >
> > I remember 1.0 is open.
>
> I can't find anything regarding dot clock tolerance in DisplayPort
> specification.

I guess since the DP is a VESA spec, it's probably .5%, just like on
the EDID (well, CVT).

Maxime

--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering