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[109.73.99.134]) by smtp.gmail.com with ESMTPSA id u4-20020a2eb804000000b00265ec8ce420sm743371ljo.122.2022.08.30.09.55.47 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 30 Aug 2022 09:55:48 -0700 (PDT) Message-ID: <1065bc99-d73a-9d19-7f09-26cd862fe0c7@linaro.org> Date: Tue, 30 Aug 2022 19:55:47 +0300 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH v2 2/9] dt-bindings: riscv: microchip: document the aries m100pfsevp Content-Language: en-US To: Conor.Dooley@microchip.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, Daire.McNamara@microchip.com, Shravan.Chippa@microchip.com Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, Cyril.Jean@microchip.com, Lewis.Hanly@microchip.com, Praveen.Kumar@microchip.com, wg@aries-embedded.de, Hugh.Breslin@microchip.com, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org References: <20220830101803.1456180-1-conor.dooley@microchip.com> <20220830101803.1456180-3-conor.dooley@microchip.com> <27b8aa9e-9173-b40e-8f9c-a53fa5ba36c8@microchip.com> From: Krzysztof Kozlowski In-Reply-To: <27b8aa9e-9173-b40e-8f9c-a53fa5ba36c8@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 30/08/2022 18:25, Conor.Dooley@microchip.com wrote: > On 30/08/2022 15:37, Krzysztof Kozlowski wrote: >> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe >> >> On 30/08/2022 13:17, Conor Dooley wrote: >>> Add compatibles for both configurations of the Aries Embedded >>> M100PFSEVP SOM + EVK platform. >>> >>> Link: https://www.aries-embedded.com/polarfire-soc-fpga-microsemi-m100pfs-som-mpfs025t-pcie-serdes >>> Signed-off-by: Conor Dooley >>> --- >>> Documentation/devicetree/bindings/riscv/microchip.yaml | 3 +++ >>> 1 file changed, 3 insertions(+) >>> >>> diff --git a/Documentation/devicetree/bindings/riscv/microchip.yaml b/Documentation/devicetree/bindings/riscv/microchip.yaml >>> index 485981fbfb4b..04ebd48caaa7 100644 >>> --- a/Documentation/devicetree/bindings/riscv/microchip.yaml >>> +++ b/Documentation/devicetree/bindings/riscv/microchip.yaml >>> @@ -27,9 +27,12 @@ properties: >>> >>> - items: >>> - enum: >>> + - aries,m100pfsevp-emmc >>> + - aries,m100pfsevp-sdcard >> >> Usually sd card is pluggable, so what is the actual difference here? For >> example this one: >> https://shop.aries-embedded.de/evaluation-kit/m/m100pfsevp/445/m100pfsevp-250baab >> has eMMC and SD card... > > Yeah, both are there but it is muxed by the bootloader using a GPIO. For > icicle this is done by a mux in the FPGA fabric instead. T Ah, this is still just one MMC controller - either as eMMC or as SD-card? > w dts were > needed so that the gpio-hog could be set correctly. Out of curiosity, I can > have the same compatible in multiple devicetrees right? In that case, it > would just be "aries,m100pfsevp" here and I could put that in both? > Would make things easier.. Depends, but I would say for this case rather not. The compatible should identify the board. If the boards are different, one compatible should not identify both of them. Imagine U-Boot (or something else) trying to match the DTS. Best regards, Krzysztof