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[82.192.45.213]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4325d10cc48sm7775667f8f.16.2025.12.21.10.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Dec 2025 10:52:51 -0800 (PST) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Philipp Zabel , Richard Genoud Cc: Thomas Petazzoni , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Richard Genoud , Krzysztof Kozlowski Subject: Re: [PATCH v2 1/4] dt-bindings: pwm: allwinner: add h616 pwm compatible Date: Sun, 21 Dec 2025 19:52:50 +0100 Message-ID: <10771871.nUPlyArG6x@jernej-laptop> In-Reply-To: <20251217082504.80226-2-richard.genoud@bootlin.com> References: <20251217082504.80226-1-richard.genoud@bootlin.com> <20251217082504.80226-2-richard.genoud@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne sreda, 17. december 2025 ob 09:25:01 Srednjeevropski standardni =C4=8Da= s je Richard Genoud napisal(a): > Allwinner H616 PWM block is quite different from the A10 or H6, but at > the end, it uses the same clocks as the H6; so the sun4i pwm binding can > be used. > It has 6 channels than can generate PWM waveforms or clocks if bypass is > enabled. >=20 > Suggested-by: Krzysztof Kozlowski > Signed-off-by: Richard Genoud > --- > .../bindings/pwm/allwinner,sun4i-a10-pwm.yaml | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) >=20 > diff --git a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pw= m.yaml b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml > index 1197858e431f..4f58110ec98f 100644 > --- a/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml > +++ b/Documentation/devicetree/bindings/pwm/allwinner,sun4i-a10-pwm.yaml > @@ -14,6 +14,9 @@ properties: > "#pwm-cells": > const: 3 > =20 > + "#clock-cells": > + const: 1 Why #clock-cells? I don't see any reason to add it. Other properties seem fine. Best regards, Jernej > + > compatible: > oneOf: > - const: allwinner,sun4i-a10-pwm > @@ -36,6 +39,7 @@ properties: > - const: allwinner,sun50i-h5-pwm > - const: allwinner,sun5i-a13-pwm > - const: allwinner,sun50i-h6-pwm > + - const: allwinner,sun50i-h616-pwm > =20 > reg: > maxItems: 1 > @@ -62,7 +66,9 @@ allOf: > properties: > compatible: > contains: > - const: allwinner,sun50i-h6-pwm > + enum: > + - allwinner,sun50i-h6-pwm > + - allwinner,sun50i-h616-pwm > =20 > then: > properties: > @@ -83,6 +89,17 @@ allOf: > clocks: > maxItems: 1 > =20 > + - if: > + not: > + properties: > + compatible: > + contains: > + const: allwinner,sun50i-h616-pwm > + > + then: > + properties: > + "#clock-cells": false > + > required: > - compatible > - reg >=20