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[88.156.142.67]) by smtp.gmail.com with ESMTPSA id x3-20020a056512078300b004ad5f5c2b28sm98868lfr.119.2022.11.24.03.48.18 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 24 Nov 2022 03:48:19 -0800 (PST) Message-ID: <1078fdea-bbb4-2a07-85f9-a81bc876dcbe@linaro.org> Date: Thu, 24 Nov 2022 12:48:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.5.0 Subject: Re: [PATCH v2 1/9] dt-bindings: clock: Add SM8550 GCC clocks Content-Language: en-US To: Abel Vesa , Andy Gross , Bjorn Andersson , Konrad Dybcio , Mike Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski Cc: Linux Kernel Mailing List , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org References: <20221123142009.594781-1-abel.vesa@linaro.org> <20221123142009.594781-2-abel.vesa@linaro.org> From: Krzysztof Kozlowski In-Reply-To: <20221123142009.594781-2-abel.vesa@linaro.org> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 23/11/2022 15:20, Abel Vesa wrote: > Add device tree bindings for global clock controller on SM8550 SoCs. > > Signed-off-by: Abel Vesa > --- > > Changes since v1: > * dropped clock-names since driver uses IDs now > * based on recent bindings, like Krzysztof asked > * used qcom,gcc.yaml and dropped redundant properties > * renamed qcom,gcc-sm8550.h to qcom,sm8550-gcc.h, to match > compatible > * dropped "Optional", like Krzysztof asked > > .../bindings/clock/qcom,sm8550-gcc.yaml | 56 +++++ > include/dt-bindings/clock/qcom,sm8550-gcc.h | 231 ++++++++++++++++++ > 2 files changed, 287 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml > create mode 100644 include/dt-bindings/clock/qcom,sm8550-gcc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml > new file mode 100644 > index 000000000000..acc540aa137d > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8550-gcc.yaml > @@ -0,0 +1,56 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/qcom,sm8550-gcc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Global Clock & Reset Controller on SM8550 > + > +maintainers: > + - Bjorn Andersson > + > +description: | > + Qualcomm global clock control module provides the clocks, resets and power > + domains on SM8550 > + > + See also:: include/dt-bindings/clock/qcom,sm8550-gcc.h > + > +properties: > + compatible: > + const: qcom,sm8550-gcc > + > + clocks: > + items: > + - description: Board XO source > + - description: Sleep clock source > + - description: PCIE 0 Pipe clock source > + - description: PCIE 1 Pipe clock source > + - description: PCIE 1 Phy Auxiliary clock source > + - description: UFS Phy Rx symbol 0 clock source > + - description: UFS Phy Rx symbol 1 clock source > + - description: UFS Phy Tx symbol 0 clock source > + - description: USB3 Phy wrapper pipe clock source > + minItems: 2 I didn't mention in your v1 this explicitly (although I asked Melody to drop it), so apologies for this. Based on my understand and our IRC discussion, these clocks are needed for the driver (even if optional in some states of hardware). If driver needs them, let's make them required, so please drop "minItems: 2". Best regards, Krzysztof