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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id z15-20020a170902cccf00b0016c0eb202a5sm12367728ple.225.2022.08.31.18.57.37 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 31 Aug 2022 18:57:40 -0700 (PDT) Message-ID: <11077b0e-0a79-401e-5232-1dc1d1a04d83@gmail.com> Date: Thu, 1 Sep 2022 10:57:36 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.13.0 Subject: Re: [PATCH 2/2] mtd: spi-nor: Add support for flash reset Content-Language: en-US To: Sai Krishna Potthuri , Tudor Ambarus , Pratyush Yadav , Michael Walle , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski Cc: devicetree@vger.kernel.org, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, saikrishna12468@gmail.com, git@amd.com, takahiro Kuwano References: <20220829090528.21613-1-sai.krishna.potthuri@amd.com> <20220829090528.21613-3-sai.krishna.potthuri@amd.com> From: Takahiro Kuwano In-Reply-To: <20220829090528.21613-3-sai.krishna.potthuri@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Hello, On 8/29/2022 6:05 PM, Sai Krishna Potthuri wrote: > Add support for spi-nor flash reset via GPIO controller by reading the > reset-gpio property. If there is a valid GPIO specifier then reset will > be performed by asserting and deasserting the GPIO using gpiod APIs > otherwise it will not perform any operation. > > Signed-off-by: Sai Krishna Potthuri > --- > drivers/mtd/spi-nor/core.c | 50 +++++++++++++++++++++++++++++++++++--- > 1 file changed, 46 insertions(+), 4 deletions(-) > > diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c > index f2c64006f8d7..d4703ff69ad0 100644 > --- a/drivers/mtd/spi-nor/core.c > +++ b/drivers/mtd/spi-nor/core.c > @@ -2401,12 +2401,8 @@ static void spi_nor_no_sfdp_init_params(struct spi_nor *nor) > */ > static void spi_nor_init_flags(struct spi_nor *nor) > { > - struct device_node *np = spi_nor_get_flash_node(nor); > const u16 flags = nor->info->flags; > > - if (of_property_read_bool(np, "broken-flash-reset")) > - nor->flags |= SNOR_F_BROKEN_RESET; > - > if (flags & SPI_NOR_SWP_IS_VOLATILE) > nor->flags |= SNOR_F_SWP_IS_VOLATILE; > > @@ -2933,9 +2929,47 @@ static void spi_nor_set_mtd_info(struct spi_nor *nor) > mtd->_put_device = spi_nor_put_device; > } > > +static int spi_nor_hw_reset(struct spi_nor *nor) > +{ > + struct gpio_desc *reset; > + int ret; > + > + reset = devm_gpiod_get_optional(nor->dev, "reset", GPIOD_ASIS); > + if (IS_ERR_OR_NULL(reset)) > + return PTR_ERR_OR_ZERO(reset); > + > + /* Set the direction as output and enable the output */ > + ret = gpiod_direction_output(reset, 1); > + if (ret) > + return ret; > + > + /* > + * Experimental Minimum Chip select high to Reset delay value > + * based on the flash device spec. > + */ > + usleep_range(1, 5); > + gpiod_set_value(reset, 0); > + > + /* > + * Experimental Minimum Reset pulse width value based on the > + * flash device spec. > + */ > + usleep_range(10, 15); > + gpiod_set_value(reset, 1); > + > + /* > + * Experimental Minimum Reset recovery delay value based on the > + * flash device spec. > + */ > + usleep_range(35, 40); Infineon (Spansion/Cypress) SEMPER flash (S25HL/HS, S28HL/HS) family specifies minimum tRH (Reset Pulse Hold - RESET# Low to CS# Low) as 450~600us. Please take care for this. Please find datasheets at the following links. https://www.infineon.com/dgdl/Infineon-S25HS256T_S25HS512T_S25HS01GT_S25HL256T_S25HL512T_S25HL01GT_256-Mb_(32-MB)_512-Mb_(64-MB)_1-Gb_(128-MB)_HS-T_(1.8-V)_HL-T_(3.0-V)_Semper_Flash_with_Quad_SPI-DataSheet-v02_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee674b86ee3&da=t https://www.infineon.com/dgdl/Infineon-S28HS256T_S28HS512T_S28HS01GT_S28HL256T_S28HL512T_S28HL01GT_256-Mb_(32-MB)_512-Mb_(64-MB)_1-Gb_(128-MB)_HS-T_(1.8-V)_HL-T_(3.0-V)_Semper_Flash_with_Octal_Interface-DataSheet-v03_00-EN.pdf?fileId=8ac78c8c7d0d8da4017d0ee6bca96f97&da=t Thanks, Takahiro Kuwano