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From: Alexandre TORGUE <alexandre.torgue@foss.st.com>
To: Amelie Delaunay <amelie.delaunay@foss.st.com>,
	Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: <dmaengine@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-hardening@vger.kernel.org>
Subject: Re: [PATCH v4 12/12] arm64: dts: st: add HPDMA nodes on stm32mp251
Date: Thu, 27 Jun 2024 16:22:41 +0200	[thread overview]
Message-ID: <1139b106-1c05-44ba-9dac-649bcc8d9315@foss.st.com> (raw)
In-Reply-To: <20240531150712.2503554-13-amelie.delaunay@foss.st.com>

Hi Amélie

On 5/31/24 17:07, Amelie Delaunay wrote:
> The High Performance Direct Memory Access (HPDMA) controller is used to
> perform programmable data transfers between memory-mapped peripherals
> and memories (or between memories) via linked-lists.
> 
> There are 3 instances of HPDMA on stm32mp251, using stm32-dma3 driver, with
> 16 channels per instance and with one interrupt per channel.
> Channels 0 to 7 are implemented with a FIFO of 8 bytes.
> Channels 8 to 11 are implemented with a FIFO of 32 bytes.
> Channels 12 to 15 are implemented with a FIFO of 128 bytes.
> Thanks to stm32-dma3 bindings, the user can ask for a channel with specific
> FIFO size.
> 
> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
> ---
> v4: use SCMI clocks now that they are available
> 
> v2: use SoC specific compatible st,stm32mp25-dma3
> ---
>   arch/arm64/boot/dts/st/stm32mp251.dtsi | 69 ++++++++++++++++++++++++++
>   1 file changed, 69 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/st/stm32mp251.dtsi b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> index dcd0656d67a8..d057dcee2534 100644
> --- a/arch/arm64/boot/dts/st/stm32mp251.dtsi
> +++ b/arch/arm64/boot/dts/st/stm32mp251.dtsi
> @@ -107,6 +107,75 @@ soc@0 {
>   		interrupt-parent = <&intc>;

...

Applied on stm32-next.

Thanks!!
Alex

  reply	other threads:[~2024-06-27 14:24 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-05-31 15:07 [PATCH v4 00/12] Introduce STM32 DMA3 support Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 01/12] dt-bindings: dma: New directory for STM32 DMA controllers bindings Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 02/12] dmaengine: stm32: New directory for STM32 DMA controllers drivers Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 03/12] MAINTAINERS: Add entry for STM32 DMA controllers drivers and documentation Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 04/12] dt-bindings: dma: Document STM32 DMA3 controller bindings Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 05/12] dmaengine: Add STM32 DMA3 support Amelie Delaunay
2024-05-31 20:21   ` Frank Li
2024-06-03  8:09     ` Amelie Delaunay
2024-06-03 14:56       ` Frank Li
2024-06-04  8:12         ` Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 06/12] dmaengine: stm32-dma3: add DMA_CYCLIC capability Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 07/12] dmaengine: stm32-dma3: add DMA_MEMCPY capability Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 08/12] dmaengine: stm32-dma3: add device_pause and device_resume ops Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 09/12] dmaengine: stm32-dma3: improve residue granularity Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 10/12] dmaengine: add channel device name to channel registration Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 11/12] dmaengine: stm32-dma3: defer channel registration to specify channel name Amelie Delaunay
2024-05-31 15:07 ` [PATCH v4 12/12] arm64: dts: st: add HPDMA nodes on stm32mp251 Amelie Delaunay
2024-06-27 14:22   ` Alexandre TORGUE [this message]
2024-06-11 18:28 ` (subset) [PATCH v4 00/12] Introduce STM32 DMA3 support Vinod Koul

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