[PATCH v2 0/5] MediaTek UFS Cleanup and MT8196 Enablement

Nicolas Frattaroli
2025-10-16T12:07:30Z

In this series, the existing MediaTek UFS binding is expanded and
completed to correctly describe not just the existing compatibles, but
also to introduce a new compatible in the from of the MT8196 SoC.

The resets, which until now were completely absent from both the UFS
host controller binding and the UFS PHY binding, are introduced to both.
This also means the driver's undocumented and, in mainline, unused reset
logic is reworked. In particular, the PHY reset is no longer a reset of
the host controller node, but of the PHY node.

This means the host controller can reset the PHY through the common PHY
framework.

The resets remain optional.

Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
---
Changes in v2:
- Reorder define in mtk_sip_svc.h
- Use bulk reset APIs in UFS host driver
- Link to v1: https://lore.kernel.org/r/20251014-mt8196-ufs-v1-0-195dceb83bc8@collabora.com

---
Nicolas Frattaroli (5):
dt-bindings: ufs: mediatek,ufs: Add mt8196-ufshci variant
dt-bindings: phy: Add mediatek,mt8196-ufsphy variant
scsi: ufs: mediatek: Move MTK_SIP_UFS_CONTROL to mtk_sip_svc.h
phy: mediatek: ufs: Add support for resets
scsi: ufs: mediatek: Rework resets

.../devicetree/bindings/phy/mediatek,ufs-phy.yaml | 16 +++
.../devicetree/bindings/ufs/mediatek,ufs.yaml | 134 +++++++++++++++++++--
drivers/phy/mediatek/phy-mtk-ufs.c | 71 +++++++++++
drivers/ufs/host/ufs-mediatek-sip.h | 9 --
drivers/ufs/host/ufs-mediatek.c | 78 ++++++------
drivers/ufs/host/ufs-mediatek.h | 7 +-
include/linux/soc/mediatek/mtk_sip_svc.h | 3 +
7 files changed, 255 insertions(+), 63 deletions(-)
---
base-commit: 40a3abb0f3e5229996c8ef0498fc8d8a0c2bd64f
change-id: 20251014-mt8196-ufs-cec4b9a97e53

Best regards,
--
Nicolas Frattaroli <nicolas.frattaroli@collabora.com>