public inbox for devicetree@vger.kernel.org
 help / color / mirror / Atom feed
From: "Jernej Škrabec" <jernej.skrabec@gmail.com>
To: linux-sunxi@lists.linux.dev, Chris Morgan <macroalpha82@gmail.com>
Cc: devicetree@vger.kernel.org, mripard@kernel.org, uwu@icenowy.me,
	samuel@sholland.org, wens@csie.org, conor+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org,
	andre.przywara@arm.com, Chris Morgan <macromorgan@hotmail.com>
Subject: Re: [PATCH V6 0/4] Add Anbernic RG-Nano
Date: Fri, 29 Sep 2023 19:09:21 +0200	[thread overview]
Message-ID: <12291999.O9o76ZdvQC@jernej-laptop> (raw)
In-Reply-To: <20230929144441.3409-1-macroalpha82@gmail.com>

Dne petek, 29. september 2023 ob 16:44:37 CEST je Chris Morgan napisal(a):
> From: Chris Morgan <macromorgan@hotmail.com>
> 
> Add support for the Anbernic RG-Nano handheld gaming device
> 
> Changes since V5:
>  - Removed references to "driver" in comments in device tree.
> 
> Changes since V4:
>  - Rebased off main branch as some patches had been pulled into main.
>  - Re-enabled the internal RTC based on advice from maintainers.
>  - Removed "clocks" property from internal RTC based on advice from
>  - maintainers.
>  - Gave external RTC alias of rtc0 and internal RTC alias of rtc1 so
>    priority would be given to the external RTC. The external RTC keeps
>    accurate time, while the internal RTC lost 8 hours for me in a 24
>    hour period.
> 
> Changes since V3:
>  - Added PHY to the OHCI and EHCI nodes. Note that the PHY driver
>    currently forces the PHY to host mode always; a correction to
>    the PHY driver or removal of the phy values from the OHCI and EHCI
>    nodes are necessary to get otg mode working properly.
>  - Disabled SoC RTC in favor of external clock. The SoC RTC is not
>    set up correctly in hardware and runs fast, whereas the external RTC
>    keeps accurate time. This matches the BSP.
>  - Added labels to GPIO pins to aid in readability.
> 
> Changes since V2:
>  - Add display support.
>  - Add USB host support.
>  - Removed CPU frequency and voltage parameters, as CPU regulator may
>    be tied into additional areas that need further testing.
>  - Added regulator names back, as they appear to have been accidentally
>    dropped in v2.
>  - Updated notes to denote all hardware tested and working.
> 
> Changes since V1:
>  - Added additional pwm pin configs to sun8i-v3s.dtsi and removed
>    default config for pwm0 in lieu of defining it for each board.
>  - Noted in patch notes that additional hardware of UART debug port,
>    USB port (in gadget mode) also work, and that USB host mode does
>    not work.
>  - Identified GPIO responsible for enabling external speaker amplifier
>    and defined it, allowing onboard audio to work.
>  - Removed ac_power_supply node.
>  - Set regulator min and max values to the same value as defined in the
>    schematics.
>  - Removed definition for reg_ldo1. This regulator is hardware
>    configured so the value did not affect anything, however the driver
>    must be updated to support the correct value of 3.3v in this case.
>  - Removed usb0_id_det-gpios as I cannot confirm these are correct.
> 
> Chris Morgan (4):
>   arm: dts: sun8i: V3s: Add pinctrl for pwm
>   ARM: dts: sun8i: v3s: add EHCI and OHCI to v3s dts
>   dt-bindings: arm: sunxi: add Anbernic RG-Nano
>   ARM: dts: sunxi: add support for Anbernic RG-Nano
> 
>  .../devicetree/bindings/arm/sunxi.yaml        |   5 +
>  arch/arm/boot/dts/allwinner/Makefile          |   1 +
>  .../allwinner/sun8i-v3s-anbernic-rg-nano.dts  | 276 ++++++++++++++++++
>  arch/arm/boot/dts/allwinner/sun8i-v3s.dtsi    |  35 +++
>  4 files changed, 317 insertions(+)
>  create mode 100644 arch/arm/boot/dts/allwinner/sun8i-v3s-anbernic-rg-nano.dts
> 

Applied, thanks!

Best regards,
Jernej




      parent reply	other threads:[~2023-09-29 17:09 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-29 14:44 [PATCH V6 0/4] Add Anbernic RG-Nano Chris Morgan
2023-09-29 14:44 ` [PATCH V6 1/4] arm: dts: sun8i: V3s: Add pinctrl for pwm Chris Morgan
2023-09-29 14:44 ` [PATCH V6 2/4] ARM: dts: sun8i: v3s: add EHCI and OHCI to v3s dts Chris Morgan
2023-09-29 14:44 ` [PATCH V6 3/4] dt-bindings: arm: sunxi: add Anbernic RG-Nano Chris Morgan
2023-09-29 14:44 ` [PATCH V6 4/4] ARM: dts: sunxi: add support for " Chris Morgan
2023-09-29 17:09 ` Jernej Škrabec [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=12291999.O9o76ZdvQC@jernej-laptop \
    --to=jernej.skrabec@gmail.com \
    --cc=andre.przywara@arm.com \
    --cc=conor+dt@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linux-sunxi@lists.linux.dev \
    --cc=macroalpha82@gmail.com \
    --cc=macromorgan@hotmail.com \
    --cc=mripard@kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=samuel@sholland.org \
    --cc=uwu@icenowy.me \
    --cc=wens@csie.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox