Re: [PATCH v2 5/8] pinctrl: sunxi: allow reading mux values from DT

["Jernej Škrabec" <jernej.skrabec@gmail.com>]

Dne petek, 14. februar 2025 ob 01:37:31 Srednjeevropski standardni čas je Andre Przywara napisal(a):
> So far every Allwinner SoC needs a large table in the kernel code, to
> describe the mapping between the pinctrl function names ("uart") and
> the actual pincontroller mux value to be written into the registers.
> This adds a lot of data into a single image kernel, and also looks
> somewhat weird, as the DT can easily store the mux value.
> 
> Add some code that allows to avoid that table: the struct that describes
> the existing pins will be build at *runtime*, based on very basic
> information provided by the respective SoC's pinctrl driver. This
> consists of the number of pins per bank, plus information which bank
> provides IRQ support, along with the mux value to use for that.
> The code will then iterate over all children of the pincontroller DT
> node (which describe each pin group), and populate that struct with the
> mapping between function names and mux values. The only thing that needs
> adding in the DT is a property with that value, per pin group.
> 
> When this table is built, it will be handed over to the existing sunxi
> pinctrl driver, which cannot tell a difference between a hardcoded
> struct and this new one built at runtime. It will take care of
> registering the pinctrl device with the pinctrl subsystem.
> 
> All a new SoC driver would need to do is to provide two arrays, and then
> call the sunxi_pinctrl_dt_table_init() function.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

I went through the code and it makes sense. I wonder if we really need to
build whole table instead of having on demand lookups into DT. However,
for now, this will do. So:

Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>

Thanks!

Best regards,
Jernej