From: Marco Pagani <marco.pagani@linux.dev>
To: Krzysztof Kozlowski <krzk@kernel.org>,
Xu Yilun <yilun.xu@linux.intel.com>
Cc: Moritz Fischer <mdf@kernel.org>, Xu Yilun <yilun.xu@intel.com>,
Tom Rix <trix@redhat.com>,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
Rob Herring <robh@kernel.org>,
Saravana Kannan <saravanak@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [RFC PATCH] fpga: region: Add support for FPGA region variants
Date: Wed, 23 Sep 2026 18:43:12 +0200 [thread overview]
Message-ID: <12839ca0-cb1d-41da-9e48-bbec59ebf230@linux.dev> (raw)
In-Reply-To: <1857df9a-8952-426e-988b-cd05d45a04cc@kernel.org>
On 23/09/2026 17:09, Krzysztof Kozlowski wrote:
> On 23/09/2026 16:30, Marco Pagani wrote:
>>
>>
>> On 18/09/2026 19:36, Xu Yilun wrote:
>>> On Fri, Sep 18, 2026 at 05:07:07PM +0200, Marco Pagani wrote:
>>>>
>>>> Hi Yilun,
>>>>
>>>> Is it okay with you if I CC the DT people to ask for an opinion?
>>>
>>> Of course. It's good to know in which case could a DTO be applied.
>>>
>>> But to be clear, I think that only affects how we accept and apply the
>>> image-DTO pair. For now, I basically don't want a varient selection
>>> interface.
>>
>>
>> Hello Rob, Saravana, Krzysztof, Conor,
>>
>> I'm CC-ing you on this thread as OF/DT maintainers to kindly ask
>> for your input on this debate we are having about how to implement
>> userspace FPGA reconfiguration, an important feature currently
>> lacking in mainline kernel.
>>
>> https://lore.kernel.org/all/20260608164247.1998417-1-marco.pagani@linux.dev
>>
>> To recap: modern FPGAs allow portions of the fabric to be reconfigured
>> at runtime to dynamically swap soft IPs. Usually, these IPs are
>> connected through a non-discoverable on-chip bus like AMBA AXI.
>> From a kernel perspective, this means the FPGA device configuration
>> image (bitstream) must be paired with a DT fragment that describes
>> the new topology.
>>
>> In this thread, we are essentially debating between two approaches for
>> implementing FPGA userspace reconfiguration at runtime:
>>
>> - Statically defined Variants (this RFC): Userspace can change FPGA
>> configuration by selecting from a pre-validated set of variants
>> (DT fragments) baked into the base DT.
>
> I don't know what DT fragments are, maybe you meant overlays? But they
> are not baked into the base DT.
>
> There are no bindings here and no DT maintainers were CCed on this RFC,
> so I really do not get how this patch can enable something like that.
>
> Linked URL shows some undocumented ABI, so obviously this would be a no
> go. And RFC prefix does not justify undocumented ABI. At least one
> without clear explanation in the cover letter, why is this RFC and why
> it cannot be merged/reviewed.
Sorry, I couldn't have imagined that missing ABI documentation in a
"proof of concept" RFC would be so detrimental while asking for a
high-level opinion.
>
>>
>> - Runtime DTOs (Nava's RFC): Userspace can change FPGA configuration
>> by loading DTOs that are validated at runtime.
>
> If runtime overlays were working, this looks suitable to the problem of
> runtime change of the hardware. This also fits hot-pluggable hardware
> problem, which Bootlin is working on.
Glad to know the problem is already being solved.
Thanks,
Marco
next prev parent reply other threads:[~2026-09-23 16:43 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <417b510f-0f6d-4695-97f5-3fc19b9377b9@linux.dev>
[not found] ` <amCn8UYdybT+RRnq@yilunxu-OptiPlex-7050>
[not found] ` <9d4af487-69a7-4a0d-9335-35c3a057de54@linux.dev>
[not found] ` <anBfAa4LpjbmYHIc@yilunxu-OptiPlex-7050>
[not found] ` <db7cfe9e-b2ba-4323-bff9-44598e1f70bb@linux.dev>
[not found] ` <anl8891cH+bUfsGY@yilunxu-OptiPlex-7050>
[not found] ` <4dbdb52e-1b28-432e-a3a7-ad9c44f17d27@linux.dev>
[not found] ` <aoJ6paA/8ndpJ17y@yilunxu-OptiPlex-7050>
[not found] ` <8848432d-45b0-4efe-adf3-adfb64fe0899@linux.dev>
[not found] ` <11b1a792-f8b1-4fce-8a7a-8352149febcf@linux.dev>
[not found] ` <aq12s+hUVnnvCKmZ@yilunxu-OptiPlex-7050>
2026-09-23 14:30 ` [RFC PATCH] fpga: region: Add support for FPGA region variants Marco Pagani
2026-09-23 15:09 ` Krzysztof Kozlowski
2026-09-23 16:43 ` Marco Pagani [this message]
2026-09-23 16:57 ` Rob Herring
2026-09-24 17:20 ` Marco Pagani
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