From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Daney Subject: [RFC PATCH 04/10] MIPS: Octeon: Add a irq_create_of_mapping() implementation. Date: Tue, 22 Feb 2011 12:57:48 -0800 Message-ID: <1298408274-20856-5-git-send-email-ddaney@caviumnetworks.com> References: <1298408274-20856-1-git-send-email-ddaney@caviumnetworks.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1298408274-20856-1-git-send-email-ddaney-M3mlKVOIwJVv6pq1l3V1OdBPR1lH4CV8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org To: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: David Daney List-Id: devicetree@vger.kernel.org This is needed for Octeon to use the Device Tree. Signed-off-by: David Daney --- arch/mips/cavium-octeon/octeon-irq.c | 25 +++++++++++++++++++++++++ 1 files changed, 25 insertions(+), 0 deletions(-) diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c index b365710..b0a9261 100644 --- a/arch/mips/cavium-octeon/octeon-irq.c +++ b/arch/mips/cavium-octeon/octeon-irq.c @@ -8,7 +8,9 @@ #include #include +#include #include +#include #include #include @@ -64,6 +66,29 @@ static void __init octeon_irq_set_ciu_mapping(int irq, int line, int bit, octeon_irq_ciu_to_irq[line][bit] = irq; } +/* + * irq_create_of_mapping - Hook to resolve OF irq specifier into a Linux irq# + * + * Octeon irq maps are a pair of indexes. The first selects either + * ciu0 or ciu1, the second is the bit within the ciu register. + */ +unsigned int irq_create_of_mapping(struct device_node *controller, + const u32 *intspec, unsigned int intsize) +{ + int ciu, bit; + unsigned int irq = 0; + + ciu = be32_to_cpup(intspec); + bit = be32_to_cpup(intspec + 1); + + if (ciu < 8 && bit < 64) + irq = octeon_irq_ciu_to_irq[ciu][bit]; + + return irq; +} +EXPORT_SYMBOL_GPL(irq_create_of_mapping); + + static int octeon_coreid_for_cpu(int cpu) { #ifdef CONFIG_SMP -- 1.7.2.3