Re: [PATCH net-next v3 1/6] dt-bindings: net: tsnep: Allow dma-coherent

[Gerhard Engleder <gerhard@engleder-embedded.com>]

On 26.09.22 10:55, Krzysztof Kozlowski wrote:
> On 25/09/2022 10:14, Gerhard Engleder wrote:
>> On 25.09.22 09:41, Krzysztof Kozlowski wrote:
>>> On 24/09/2022 20:11, Gerhard Engleder wrote:
>>>> On 24.09.22 11:15, Krzysztof Kozlowski wrote:
>>>>> On 23/09/2022 22:29, Gerhard Engleder wrote:
>>>>>> Fix the following dtbs_check error if dma-coherent is used:
>>>>>>
>>>>>> ...: 'dma-coherent' does not match any of the regexes: 'pinctrl-[0-9]+'
>>>>>>    From schema: .../Documentation/devicetree/bindings/net/engleder,tsnep.yaml
>>>>>
>>>>> Skip last line - it's obvious. What instead you miss here - the
>>>>> DTS/target which has this warning. I assume that some existing DTS uses
>>>>> this property?
>>>>
>>>> I will skip that line.
>>>>
>>>> The binding is for an FPGA based Ethernet MAC. I'm working with
>>>> an evaluation platform currently. The DTS for the evaluation platform
>>>> is mainline, but my derived DTS was not accepted mainline. So there is
>>>> no DTS. This is similar for other FPGA based devices.
>>>
>>> If this is not coming from mainline, then there is no warning...  we are
>>> not interested in warnings in out-of-tree code, because we are not
>>> fixing them.
>>
>> Ok. So I would rewrite the description that it just allows dma-coherent
>> and remove the fix/warning stuff. Is that ok?
> 
> That would be okay, but please add answer to why you are making this change.

I already prepared it:

Within SoCs like ZynqMP, FPGA logic can be connected to different kinds
of AXI master ports. Also cache coherent AXI master ports are available.
The property "dma-coherent" is used to signal that DMA is cache
coherent.
Add "dma-coherent" property to allow the configuration of cache coherent
DMA.

Thanks!

Gerhard