RE: [PATCH] arm64: dts: imx8mp: Fix LAN8740Ai PHY reference clock on DH electronics i.MX8M Plus DHCOM

[Christoph Niedermaier <cniedermaier@dh-electronics.com>]

From: Marek Vasut <marek.vasut@mailbox.org>
Sent: Tuesday, December 2, 2025 2:42 PM
> Add missing 'clocks' property to LAN8740Ai PHY node, to allow the PHY driver
> to manage LAN8740Ai CLKIN reference clock supply. This fixes sporadic link
> bouncing caused by interruptions on the PHY reference clock, by letting the
> PHY driver manage the reference clock and assure there are no interruptions.
> 
> This follows the matching PHY driver recommendation described in commit
> bedd8d78aba3 ("net: phy: smsc: LAN8710/20: add phy refclk in support")
> 
> Fixes: 8d6712695bc8 ("arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM
> and PDK2")
> Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
> ---
> Cc: Christoph Niedermaier <cniedermaier@dh-electronics.com>
> Cc: Conor Dooley <conor+dt@kernel.org>
> Cc: Fabio Estevam <festevam@gmail.com>
> Cc: Krzysztof Kozlowski <krzk+dt@kernel.org>
> Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Sascha Hauer <s.hauer@pengutronix.de>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: devicetree@vger.kernel.org
> Cc: imx@lists.linux.dev
> Cc: kernel@dh-electronics.com
> Cc: linux-arm-kernel@lists.infradead.org
> ---
>  arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> index 68c2e0156a5c8..f8303b7e2bd22 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-som.dtsi
> @@ -113,6 +113,7 @@ mdio {
>                 ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */
>                         compatible = "ethernet-phy-id0007.c110",
>                                      "ethernet-phy-ieee802.3-c22";
> +                       clocks = <&clk IMX8MP_CLK_ENET_QOS>;
>                         interrupt-parent = <&gpio3>;
>                         interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
>                         pinctrl-0 = <&pinctrl_ethphy0>;

Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>

Regards
Christoph