* [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR
@ 2022-08-23 16:56 Marek Vasut
2022-08-23 17:26 ` Fabio Estevam
` (2 more replies)
0 siblings, 3 replies; 7+ messages in thread
From: Marek Vasut @ 2022-08-23 16:56 UTC (permalink / raw)
To: linux-arm-kernel
Cc: Marek Vasut, Fabio Estevam, Marcel Ziswiler, Peng Fan,
Rob Herring, Shawn Guo, NXP Linux Team, devicetree
Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store
e.g. boot counter.
Signed-off-by: Marek Vasut <marex@denx.de>
---
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
---
arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index f7adcb2c14880..21689e9e68170 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -478,6 +478,11 @@ snvs_pwrkey: snvs-powerkey {
wakeup-source;
status = "disabled";
};
+
+ snvs_lpgpr: snvs-lpgpr {
+ compatible = "fsl,imx8mp-snvs-lpgpr",
+ "fsl,imx7d-snvs-lpgpr";
+ };
};
clk: clock-controller@30380000 {
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread* Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR 2022-08-23 16:56 [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR Marek Vasut @ 2022-08-23 17:26 ` Fabio Estevam 2022-08-24 5:51 ` Alexander Stein 2022-09-04 12:36 ` Shawn Guo 2 siblings, 0 replies; 7+ messages in thread From: Fabio Estevam @ 2022-08-23 17:26 UTC (permalink / raw) To: Marek Vasut Cc: linux-arm-kernel, Marcel Ziswiler, Peng Fan, Rob Herring, Shawn Guo, NXP Linux Team, devicetree On 23/08/2022 13:56, Marek Vasut wrote: > Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store > e.g. boot counter. > > Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR 2022-08-23 16:56 [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR Marek Vasut 2022-08-23 17:26 ` Fabio Estevam @ 2022-08-24 5:51 ` Alexander Stein 2022-08-31 14:45 ` Marek Vasut 2022-09-04 12:36 ` Shawn Guo 2 siblings, 1 reply; 7+ messages in thread From: Alexander Stein @ 2022-08-24 5:51 UTC (permalink / raw) To: Marek Vasut Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan, Rob Herring, Shawn Guo, NXP Linux Team, devicetree, Marek Vasut Hello Marek, Am Dienstag, 23. August 2022, 18:56:02 CEST schrieb Marek Vasut: > Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store > e.g. boot counter. > > Signed-off-by: Marek Vasut <marex@denx.de> > --- > Cc: Fabio Estevam <festevam@denx.de> > Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Cc: Peng Fan <peng.fan@nxp.com> > Cc: Rob Herring <robh+dt@kernel.org> > Cc: Shawn Guo <shawnguo@kernel.org> > Cc: NXP Linux Team <linux-imx@nxp.com> > Cc: devicetree@vger.kernel.org > To: linux-arm-kernel@lists.infradead.org > --- > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > f7adcb2c14880..21689e9e68170 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -478,6 +478,11 @@ snvs_pwrkey: snvs-powerkey { > wakeup-source; > status = "disabled"; > }; > + > + snvs_lpgpr: snvs-lpgpr { > + compatible = "fsl,imx8mp-snvs-lpgpr", > + "fsl,imx7d-snvs-lpgpr"; > + }; > }; > > clk: clock-controller@30380000 { Do you have any information that the i.MX8M Plus actually has the HPLR register (at offset 0)? This is used in snvs_lpgpr_write. I can't find it in the RM, although GPR_SL is referenced in LPGPRx register description. Best regards, Alexander ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR 2022-08-24 5:51 ` Alexander Stein @ 2022-08-31 14:45 ` Marek Vasut 2022-08-31 14:58 ` Alexander Stein 0 siblings, 1 reply; 7+ messages in thread From: Marek Vasut @ 2022-08-31 14:45 UTC (permalink / raw) To: Alexander Stein Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan, Rob Herring, Shawn Guo, NXP Linux Team, devicetree On 8/24/22 07:51, Alexander Stein wrote: > Hello Marek, Hi, > Am Dienstag, 23. August 2022, 18:56:02 CEST schrieb Marek Vasut: >> Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store >> e.g. boot counter. [...] >> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi >> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index >> f7adcb2c14880..21689e9e68170 100644 >> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi >> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi >> @@ -478,6 +478,11 @@ snvs_pwrkey: snvs-powerkey { >> wakeup-source; >> status = "disabled"; >> }; >> + >> + snvs_lpgpr: snvs-lpgpr { >> + compatible = > "fsl,imx8mp-snvs-lpgpr", >> + > "fsl,imx7d-snvs-lpgpr"; >> + }; >> }; >> >> clk: clock-controller@30380000 { > > Do you have any information that the i.MX8M Plus actually has the HPLR > register (at offset 0)? This is used in snvs_lpgpr_write. I can't find it in > the RM, although GPR_SL is referenced in LPGPRx register description. It seems the HPLR is only documented in the Security RM (MX8MMSRM, MX8MPSRM etc), not in the regular RM (MX8MMRM, MX8MPRM etc) . So it seems the register does exist, including the soft lock bit, it is only omitted from the plain RM. (also, sorry for the delayed reply) ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR 2022-08-31 14:45 ` Marek Vasut @ 2022-08-31 14:58 ` Alexander Stein 2022-08-31 14:59 ` Marek Vasut 0 siblings, 1 reply; 7+ messages in thread From: Alexander Stein @ 2022-08-31 14:58 UTC (permalink / raw) To: Marek Vasut Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan, Rob Herring, Shawn Guo, NXP Linux Team, devicetree Hi Marek, Am Mittwoch, 31. August 2022, 16:45:31 CEST schrieb Marek Vasut: > On 8/24/22 07:51, Alexander Stein wrote: > > Hello Marek, > > Hi, > > > Am Dienstag, 23. August 2022, 18:56:02 CEST schrieb Marek Vasut: > >> Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store > >> e.g. boot counter. > > [...] > > >> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > >> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index > >> f7adcb2c14880..21689e9e68170 100644 > >> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > >> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > >> @@ -478,6 +478,11 @@ snvs_pwrkey: snvs-powerkey { > >> > >> wakeup-source; > >> status = "disabled"; > >> > >> }; > >> > >> + > >> + snvs_lpgpr: snvs-lpgpr { > >> + compatible = > > > > "fsl,imx8mp-snvs-lpgpr", > > > >> + > > > > "fsl,imx7d-snvs-lpgpr"; > > > >> + }; > >> > >> }; > >> > >> clk: clock-controller@30380000 { > > > > Do you have any information that the i.MX8M Plus actually has the HPLR > > register (at offset 0)? This is used in snvs_lpgpr_write. I can't find it > > in the RM, although GPR_SL is referenced in LPGPRx register description. > It seems the HPLR is only documented in the Security RM (MX8MMSRM, > MX8MPSRM etc), not in the regular RM (MX8MMRM, MX8MPRM etc) . So it > seems the register does exist, including the soft lock bit, it is only > omitted from the plain RM. > > (also, sorry for the delayed reply) Ah, there it is. Nice! Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR 2022-08-31 14:58 ` Alexander Stein @ 2022-08-31 14:59 ` Marek Vasut 0 siblings, 0 replies; 7+ messages in thread From: Marek Vasut @ 2022-08-31 14:59 UTC (permalink / raw) To: Alexander Stein Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan, Rob Herring, Shawn Guo, NXP Linux Team, devicetree On 8/31/22 16:58, Alexander Stein wrote: > Hi Marek, > > Am Mittwoch, 31. August 2022, 16:45:31 CEST schrieb Marek Vasut: >> On 8/24/22 07:51, Alexander Stein wrote: >>> Hello Marek, >> >> Hi, >> >>> Am Dienstag, 23. August 2022, 18:56:02 CEST schrieb Marek Vasut: >>>> Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store >>>> e.g. boot counter. >> >> [...] >> >>>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi >>>> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index >>>> f7adcb2c14880..21689e9e68170 100644 >>>> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi >>>> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi >>>> @@ -478,6 +478,11 @@ snvs_pwrkey: snvs-powerkey { >>>> >>>> wakeup-source; >>>> status = "disabled"; >>>> >>>> }; >>>> >>>> + >>>> + snvs_lpgpr: snvs-lpgpr { >>>> + compatible = >>> >>> "fsl,imx8mp-snvs-lpgpr", >>> >>>> + >>> >>> "fsl,imx7d-snvs-lpgpr"; >>> >>>> + }; >>>> >>>> }; >>>> >>>> clk: clock-controller@30380000 { >>> >>> Do you have any information that the i.MX8M Plus actually has the HPLR >>> register (at offset 0)? This is used in snvs_lpgpr_write. I can't find it >>> in the RM, although GPR_SL is referenced in LPGPRx register description. >> It seems the HPLR is only documented in the Security RM (MX8MMSRM, >> MX8MPSRM etc), not in the regular RM (MX8MMRM, MX8MPRM etc) . So it >> seems the register does exist, including the soft lock bit, it is only >> omitted from the plain RM. >> >> (also, sorry for the delayed reply) > > Ah, there it is. Nice! > > Reviewed-by: Alexander Stein <alexander.stein@ew.tq-group.com> Thank you ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR 2022-08-23 16:56 [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR Marek Vasut 2022-08-23 17:26 ` Fabio Estevam 2022-08-24 5:51 ` Alexander Stein @ 2022-09-04 12:36 ` Shawn Guo 2 siblings, 0 replies; 7+ messages in thread From: Shawn Guo @ 2022-09-04 12:36 UTC (permalink / raw) To: Marek Vasut Cc: linux-arm-kernel, Fabio Estevam, Marcel Ziswiler, Peng Fan, Rob Herring, NXP Linux Team, devicetree On Tue, Aug 23, 2022 at 06:56:02PM +0200, Marek Vasut wrote: > Add SNVS LPGPR bindings to MX8M Plus, the LPGPR is used to store > e.g. boot counter. > > Signed-off-by: Marek Vasut <marex@denx.de> Applied, thanks! ^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-09-04 12:36 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-08-23 16:56 [PATCH] arm64: dts: imx8mp: Add SNVS LPGPR Marek Vasut 2022-08-23 17:26 ` Fabio Estevam 2022-08-24 5:51 ` Alexander Stein 2022-08-31 14:45 ` Marek Vasut 2022-08-31 14:58 ` Alexander Stein 2022-08-31 14:59 ` Marek Vasut 2022-09-04 12:36 ` Shawn Guo
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