* [PATCH] arm64: dts: qcom: qcm2290: Add crypto engine
@ 2025-03-27 14:28 Loic Poulain
2025-03-27 15:05 ` Dmitry Baryshkov
0 siblings, 1 reply; 4+ messages in thread
From: Loic Poulain @ 2025-03-27 14:28 UTC (permalink / raw)
To: andersson, konradybcio; +Cc: robh, linux-arm-msm, devicetree, Loic Poulain
Add Qualcomm Crypto Engine (QCE) and BAM related nodes for this SoC.
Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
---
arch/arm64/boot/dts/qcom/qcm2290.dtsi | 28 +++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
index f0746123e594..c9ac06164d43 100644
--- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
@@ -749,6 +749,34 @@ config_noc: interconnect@1900000 {
#interconnect-cells = <2>;
};
+ cryptobam: dma@1b04000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x0 0x01b04000 0x0 0x24000>;
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&rpmcc RPM_SMD_CE1_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x0084 0x0011>,
+ <&apps_smmu 0x0086 0x0011>,
+ <&apps_smmu 0x0094 0x0011>,
+ <&apps_smmu 0x0096 0x0011>;
+ };
+
+ crypto: crypto@1b3a000 {
+ compatible = "qcom,qcm2290-qce", "qcom,qce";
+ reg = <0x0 0x01b3a000 0x0 0x6000>;
+ clocks = <&rpmcc RPM_SMD_CE1_CLK>;
+ clock-names = "core";
+ dmas = <&cryptobam 6>, <&cryptobam 7>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x0084 0x0011>,
+ <&apps_smmu 0x0086 0x0011>,
+ <&apps_smmu 0x0094 0x0011>,
+ <&apps_smmu 0x0096 0x0011>;
+ };
+
qfprom@1b44000 {
compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";
reg = <0x0 0x01b44000 0x0 0x3000>;
--
2.34.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: qcm2290: Add crypto engine
2025-03-27 14:28 [PATCH] arm64: dts: qcom: qcm2290: Add crypto engine Loic Poulain
@ 2025-03-27 15:05 ` Dmitry Baryshkov
2025-03-27 17:13 ` Konrad Dybcio
0 siblings, 1 reply; 4+ messages in thread
From: Dmitry Baryshkov @ 2025-03-27 15:05 UTC (permalink / raw)
To: Loic Poulain; +Cc: andersson, konradybcio, robh, linux-arm-msm, devicetree
On Thu, Mar 27, 2025 at 03:28:42PM +0100, Loic Poulain wrote:
> Add Qualcomm Crypto Engine (QCE) and BAM related nodes for this SoC.
>
> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
> ---
> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 28 +++++++++++++++++++++++++++
> 1 file changed, 28 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> index f0746123e594..c9ac06164d43 100644
> --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> @@ -749,6 +749,34 @@ config_noc: interconnect@1900000 {
> #interconnect-cells = <2>;
> };
>
> + cryptobam: dma@1b04000 {
> + compatible = "qcom,bam-v1.7.0";
> + reg = <0x0 0x01b04000 0x0 0x24000>;
> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&rpmcc RPM_SMD_CE1_CLK>;
> + clock-names = "bam_clk";
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + iommus = <&apps_smmu 0x0084 0x0011>,
> + <&apps_smmu 0x0086 0x0011>,
> + <&apps_smmu 0x0094 0x0011>,
> + <&apps_smmu 0x0096 0x0011>;
> + };
> +
> + crypto: crypto@1b3a000 {
> + compatible = "qcom,qcm2290-qce", "qcom,qce";
> + reg = <0x0 0x01b3a000 0x0 0x6000>;
> + clocks = <&rpmcc RPM_SMD_CE1_CLK>;
> + clock-names = "core";
> + dmas = <&cryptobam 6>, <&cryptobam 7>;
> + dma-names = "rx", "tx";
> + iommus = <&apps_smmu 0x0084 0x0011>,
> + <&apps_smmu 0x0086 0x0011>,
> + <&apps_smmu 0x0094 0x0011>,
> + <&apps_smmu 0x0096 0x0011>;
Don't these fall into the previous entries + mask? The same question
applies to BAM SMMU entries.
> + };
> +
> qfprom@1b44000 {
> compatible = "qcom,qcm2290-qfprom", "qcom,qfprom";
> reg = <0x0 0x01b44000 0x0 0x3000>;
> --
> 2.34.1
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: qcm2290: Add crypto engine
2025-03-27 15:05 ` Dmitry Baryshkov
@ 2025-03-27 17:13 ` Konrad Dybcio
2025-03-27 18:17 ` Dmitry Baryshkov
0 siblings, 1 reply; 4+ messages in thread
From: Konrad Dybcio @ 2025-03-27 17:13 UTC (permalink / raw)
To: Dmitry Baryshkov, Loic Poulain
Cc: andersson, konradybcio, robh, linux-arm-msm, devicetree
On 3/27/25 4:05 PM, Dmitry Baryshkov wrote:
> On Thu, Mar 27, 2025 at 03:28:42PM +0100, Loic Poulain wrote:
>> Add Qualcomm Crypto Engine (QCE) and BAM related nodes for this SoC.
>>
>> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
>> ---
>> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 28 +++++++++++++++++++++++++++
>> 1 file changed, 28 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
>> index f0746123e594..c9ac06164d43 100644
>> --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
>> @@ -749,6 +749,34 @@ config_noc: interconnect@1900000 {
>> #interconnect-cells = <2>;
>> };
>>
>> + cryptobam: dma@1b04000 {
>> + compatible = "qcom,bam-v1.7.0";
>> + reg = <0x0 0x01b04000 0x0 0x24000>;
>> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
>> + clocks = <&rpmcc RPM_SMD_CE1_CLK>;
>> + clock-names = "bam_clk";
>> + #dma-cells = <1>;
>> + qcom,ee = <0>;
>> + qcom,controlled-remotely;
>> + iommus = <&apps_smmu 0x0084 0x0011>,
>> + <&apps_smmu 0x0086 0x0011>,
>> + <&apps_smmu 0x0094 0x0011>,
>> + <&apps_smmu 0x0096 0x0011>;
>> + };
>> +
>> + crypto: crypto@1b3a000 {
>> + compatible = "qcom,qcm2290-qce", "qcom,qce";
>> + reg = <0x0 0x01b3a000 0x0 0x6000>;
>> + clocks = <&rpmcc RPM_SMD_CE1_CLK>;
>> + clock-names = "core";
>> + dmas = <&cryptobam 6>, <&cryptobam 7>;
>> + dma-names = "rx", "tx";
>> + iommus = <&apps_smmu 0x0084 0x0011>,
>> + <&apps_smmu 0x0086 0x0011>,
>> + <&apps_smmu 0x0094 0x0011>,
>> + <&apps_smmu 0x0096 0x0011>;
>
> Don't these fall into the previous entries + mask? The same question
> applies to BAM SMMU entries.
(effective sid = e.g. 0x0084 & ~0x0011)
Konrad
^ permalink raw reply [flat|nested] 4+ messages in thread* Re: [PATCH] arm64: dts: qcom: qcm2290: Add crypto engine
2025-03-27 17:13 ` Konrad Dybcio
@ 2025-03-27 18:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 4+ messages in thread
From: Dmitry Baryshkov @ 2025-03-27 18:17 UTC (permalink / raw)
To: Konrad Dybcio
Cc: Loic Poulain, andersson, konradybcio, robh, linux-arm-msm,
devicetree
On Thu, Mar 27, 2025 at 06:13:29PM +0100, Konrad Dybcio wrote:
> On 3/27/25 4:05 PM, Dmitry Baryshkov wrote:
> > On Thu, Mar 27, 2025 at 03:28:42PM +0100, Loic Poulain wrote:
> >> Add Qualcomm Crypto Engine (QCE) and BAM related nodes for this SoC.
> >>
> >> Signed-off-by: Loic Poulain <loic.poulain@oss.qualcomm.com>
> >> ---
> >> arch/arm64/boot/dts/qcom/qcm2290.dtsi | 28 +++++++++++++++++++++++++++
> >> 1 file changed, 28 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> >> index f0746123e594..c9ac06164d43 100644
> >> --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
> >> @@ -749,6 +749,34 @@ config_noc: interconnect@1900000 {
> >> #interconnect-cells = <2>;
> >> };
> >>
> >> + cryptobam: dma@1b04000 {
> >> + compatible = "qcom,bam-v1.7.0";
> >> + reg = <0x0 0x01b04000 0x0 0x24000>;
> >> + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>;
> >> + clocks = <&rpmcc RPM_SMD_CE1_CLK>;
> >> + clock-names = "bam_clk";
> >> + #dma-cells = <1>;
> >> + qcom,ee = <0>;
> >> + qcom,controlled-remotely;
> >> + iommus = <&apps_smmu 0x0084 0x0011>,
> >> + <&apps_smmu 0x0086 0x0011>,
> >> + <&apps_smmu 0x0094 0x0011>,
> >> + <&apps_smmu 0x0096 0x0011>;
> >> + };
> >> +
> >> + crypto: crypto@1b3a000 {
> >> + compatible = "qcom,qcm2290-qce", "qcom,qce";
> >> + reg = <0x0 0x01b3a000 0x0 0x6000>;
> >> + clocks = <&rpmcc RPM_SMD_CE1_CLK>;
> >> + clock-names = "core";
> >> + dmas = <&cryptobam 6>, <&cryptobam 7>;
> >> + dma-names = "rx", "tx";
> >> + iommus = <&apps_smmu 0x0084 0x0011>,
> >> + <&apps_smmu 0x0086 0x0011>,
> >> + <&apps_smmu 0x0094 0x0011>,
> >> + <&apps_smmu 0x0096 0x0011>;
> >
> > Don't these fall into the previous entries + mask? The same question
> > applies to BAM SMMU entries.
>
> (effective sid = e.g. 0x0084 & ~0x0011)
Yes, 0x0094 & ~0x0011 = 0x0084.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 4+ messages in thread
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2025-03-27 14:28 [PATCH] arm64: dts: qcom: qcm2290: Add crypto engine Loic Poulain
2025-03-27 15:05 ` Dmitry Baryshkov
2025-03-27 17:13 ` Konrad Dybcio
2025-03-27 18:17 ` Dmitry Baryshkov
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