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Thu, 01 Oct 2026 01:07:04 -0700 (PDT) X-Received: by 2002:a05:620a:84c6:b0:93c:9e43:6807 with SMTP id af79cd13be357-93ca97b92eemr630024085a.3.1790842023633; Thu, 01 Oct 2026 01:07:03 -0700 (PDT) Received: from [192.168.202.12] ([178.235.128.140]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-6ae5ca72d4esm648046a12.25.2026.10.01.01.07.01 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 01 Oct 2026 01:07:02 -0700 (PDT) Message-ID: <12e76437-c2bb-40b5-ac9d-a6f89f5f3999@oss.qualcomm.com> Date: Thu, 1 Oct 2026 10:07:00 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 4/5] phy: qcom: snps-femto-v2: Move PHY init registers to config tables To: Varadarajan Narayanan , Vinod Koul , Neil Armstrong , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Wesley Cheng , Manu Gautam , Stephen Boyd , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20260924-phy-v3-0-088e7be0cfaa@oss.qualcomm.com> <20260924-phy-v3-4-088e7be0cfaa@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20260924-phy-v3-4-088e7be0cfaa@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYxMDAxMDAzMiBTYWx0ZWRfX7/7mRdNbliZJ 5b533kZMad714u11ZaBhE3hnUZijbhnbrn9nUiKB/p1m1A8rXw748UlfQRVKniylDyhRJoQL8Mr vY8IgZoGX0Cq0BOmEJB6jcdG9KpUuTCTlTeHIHLRfrApDz16cLKl17Kk9V6BKllgOyBdeve9gVL ekCtnEIkEHtQOHvfgJCLA9SeVGnMw5kx40S/iIK82i4rISfA3+vbwvQIC7beezIbnquUb3nLB3Y OZmFdGiDlx8/VS43GuvUQ2MNn+OqU57Rqe85Q5IW/8NlmOEpZet8aJWlNqRBKftEVroITlDKXXw 6bGCx3XV7tgumrIRH3opP2/Eao/H1aGGFgRVvef7QoH4dKcDkbIbovNOk/6Ur6Gv+YKBojg89nX SzDpye5gqYJxHPffVXu6CVF3K5H+0TekFz0n3I8G5PmFe0ITsJ9+wh2NAdQMCy7H8OgQ/x8k2Bb whbLxRO6ql2PhdHLSMg== X-Proofpoint-Spam-Info: AW1haW4tMjYxMDAxMDAzMiBTYWx0ZWRfX6oJTcOaOPBJz KKfZfLYjwcAJwqfeSEfrTyjjjG5U2K8nc0YDkS4hrzsc0PX/65dDIWO22aJEc1N4kZPki/oStaN Hd/H/L/uzYnauf068dQpXuOFGZuIuU4= X-Proofpoint-ORIG-GUID: Eb67Zr6E6HDyd9rIntyHAuBJ5SHv2V67 X-Proofpoint-GUID: Eb67Zr6E6HDyd9rIntyHAuBJ5SHv2V67 X-Authority-Analysis: v=2.4 cv=NrJE4MdJ c=1 sm=1 tr=0 ts=6abe14a9 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=PRfkaYvzSr8QmIIGAkY2Sg==:17 a=IkcTkHD0fZMA:10 a=660iZSQnnn4A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=DJpcGTmdVt4CTyJn9g5Z:22 a=lPcTt8mPJekVWdHiCMEA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-10-01_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1015 bulkscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2610010032 On 9/24/26 8:10 AM, Varadarajan Narayanan wrote: > The driver currently programs the common PHY register sequence directly in > qcom_snps_hsphy_init(), with the fixed register writes split around the > override parameter handling. This makes it hard to support SoCs that need a > different sequence or different values. > > Move the fixed pre- and post-override register programming into per- > compatible configuration tables, and keep the 7 nm override parameters in > the same match-data structure. This allows the driver to share the common > sequence while adding SoC-specific sequences for future platforms such as > IPQ9650. > > Additionally, address the register bit field mask & value mixup for > USB2_PHY_USB_PHY_REFCLK_CTRL in qcom_snps_hsphy_init() and USB2_AUTO_RESUME > in qcom_snps_hsphy_suspend(). Please separate this out. Otherwise GPT thinks this patch looks alright Konrad